A 7GS/s complete-DDFS-solution featuring a two-times interleaved RDAC with 1.2Vpp-diff output swing was fabricated in 65nm CMOS. The frequency tuning and amplitude resolutions are 24-bits and 10-bits respectively. The RDAC includes a mixed-signal, high-speed architecture for random swapping thermometer coding dynamic element matching that improves the narrowband SFDR up to 8dB for output frequencies below 1.85GHz. The proposed techniques enable a 7 GS/s operation with a spurious-free dynamic range better than 32dBc over the full Nyquist bandwidth. The worst case narrowband SFDR is 42dBc. This system consumes 87.9mW/(GS/s) from a 1.2V power supply when the RSTC-DEM method is enabled, resulting in a FoM of 458.9GS/s·2(SFDR/6)/W. A proof-of-concept chip with an active area of only 0.22mm2 was measured in prototypes encapsulated in a 144-pins low profile quad flat package.

This paper proposes a rail-to-rail OTA. By adding a signal decomposing circuit at the input of given OTAs that have a limited input voltage range, a rail-to-rail OTA is obtained. Each decomposed input voltage signal is converted to a current signal by an OTA and each output current of OTAs is summed to obtain a linear output signal. Since the input signal is decomposed into small magnitude voltage signals, the OTAs used to the voltage-current conversion do not require a wide input-range and any OTA can be used to realize a rail-to-rail input voltage range OTA. HSPICE simulations are performed to verify the validity of the proposed method.

A novel linear voltage-to-current conversion circuit for a rail-to-rail input voltage is proposed in this paper. A pair of MOSFETs operating in plural regions are used for the conversion and a difference of their drain currents is used as an output current. The two MOSFETs work complemetarily and realize a rail-to-rail input range. The output current is linear in any input voltage from the ground potential to a power-supply voltage. Two types of circuit configurations which realize the proposed concept are given. From the viewpoint of area efficiency and linearity the proposed circuit is superior to a voltage-to-current converter previously proposed by the authors, which uses a set of three MOSFETs to achieve a rail-to-rail voltage-to-current conversion . The operation principle of the proposed method is confirmed through HSPICE simulations.

A mapping circuit in order to have a wider input dynamic range is proposed. MOSFET's connecting between power supply lines are employed to construct the mapping circuit. SPICE simulation is shown to evaluate the proposed circuits. With the proposed mapping circuit, two-MOSFET subtractor has a rail-to-rail input voltage. As an application, an OTA consisting of subtractors is realized by employing the proposed mapping circuits to have a rail-to-rail input voltage range.

This paper proposes a novel method to realize an input stage for a rail-to-rail operational transconductance amplifier (OTA). The proposed input stage consists of single channel type MOSFETs. Therefore no matching is necessary between n-channel MOSFETs and p-channel MOSFETs unlike conventional methods. The proposed input stage is composed of three MOSFETs which operate in plural operation regions. Nevertheless a combination of drain currents of the three MOSFETs is proportional to an input voltage which varies between two power-supply rails. A circuit configuration to realize a rail-to-rail OTA with the proposed input stage is also proposed. The operation principle and the validity of the proposed circuit are confirmed through HSPICE simulations.

Voltage follower is one of the most useful building blocks in analog circuits. This paper proposes a voltage follower composed of a complementary pair of p-channel MOS(PMOS) and n-channel MOS (NMOS) differential amplifiers which operates under low power supply. The proposed circuit has a rail-to-rail dynamic range by combining complementary differential amplifiers.