This paper presents an architecture for a single-chip MPEG-2 video encoder and demonstrates its flexibility and usefulness. The architecture based on three-layer cooperation provides flexible data-transfer that improves the encoder from the standpoints of versatility, scalability, and video quality. The LSI was successfully fabricated in the 0.25-µm four-metal CMOS process. Its small size and its low power consumption make it ideal for a wide range of applications, such as DVD recorders, PC-card encoders and HDTV encoders.

Existing multimedia processors having millions of transistors are not suitable for portable multimedia services and existing fixed-point DSP chips having fixed data formats are not appropriate for multimedia applications. This paper proposes a multimedia fixed-point DSP (MDSP) chip for portable multimedia services and its chip implementation. MDSP employs parallel processing techniques, such as SIMD, vector processing, and DSP techniques. MDSP can handle 8-, 16-, 32- or 40-bit data and can perform two MAC operations in parallel. In addition, MDSP can complete two vector operations with two data movements in a cycle. With these features, MDSP can handle both 2-D video signal processing and 1-D signal processing. The prototype MDSP chip has 68,831 gates, has been fabricated, and is running at 30 MHz.

This paper proposes an efficient design method of three-dimensional (3-D) recursive digital filters for video signal processing via decomposition of magnitude specifications. A given magnitude specification of a 3-D digital filter is decomposed into specifications of 1-D digital filters with three different (horizontal, vertical, and temporal) directions. This decomposition can reduce design problems of 3-D digital filters to design problems of 1-D digital filters, which can be designed with ease by conventional methods. Consequently, design of 3-D digital filters can be efficiently performed without complicated tests for stability and large amount of computations. In order to process video signal in real time, the 1-D digital filters with temporal direction must be causal, which is not the case in horizontal and vertical directions. Since the proposed method can approximate negative magnitude specifications obtained by the decomposition with causal 1-D R filters, the 1-D digital filters with temporal direction can be causal. Therefore the 3-D digital filters designed by the proposed method is suitable for real time video signal processing. The designed 3-D digital filters have a parallel separable structure having high parallelism, regularity and modularity, and thus is suitable for high-speed VLSI implementation.