This paper presents an ultra-low-power class-AB bulk-driven operational transconductance amplifier operating in the subthreshold region. Employing the partial positive feedback in current mirrors, the effective transconductance and output voltage swing are enhanced considerably without additional power consumption and layout area. Both traditional and proposed OTAs are designed and simulated for a 180 nm CMOS process. They dissipate an ultra low power of 192 nW. The proposed OTA features not only a DC gain enhancement of 14 dB but also a slew rate improvement of 200%. In addition, the improved gain leads to a 5.3 times wider unity-gain bandwidth than that of the traditional OTA.

This paper presents a voltage reference that utilizes the virtually diode-connected MOS transistors, biased in the weak-inversion region. The proposed architecture increases the gain of the feedback loop that consequently reduces the system sensitivity, and hence improves the PSRR. The circuit is designed and simulated in a standard 0.18 µm CMOS technology. The simulation results in HSPICE indicate the successful operation of the circuit as follows: the PSRR at DC frequency is 86 dB and for the temperature range from -55C to 125C, the variation of the output reference voltage is less than 66 ppm/C.

In this paper, a low-voltage, wide-common-mode-range and high-CMRR OTA is presented. The proposed OTA consists of two circuit blocks; one is the input stage and operates as a differential level shifter, and the other is a highly linear output stage. Furthermore, the OTA can be operated in both weak and strong inversion regions. The proposed OTA is evaluated through Star-HSPICE with 0.18 µm CMOS device parameters (LEVEL53). Simulation results demonstrate a CMRR of 158 dB, a common-mode-input-range of 65 mV to 720 mV and a current consumption of 1.2 µA when VDD=0.8 V.

In this letter, two OTAs with MOSFETs operating in the weak inversion region are proposed. One of the OTAs uses the exponential-logarithm transformation algorithm. Furthermore, the other realizes the high-linearity characteristics due to a small fluctuation of the common-terminal voltage of differential pair. The performance of the proposed OTAs was confirmed by HSPICE simulation.

This work presents an ultra-low-voltage ultra-low-power weak inversion composite MOS transistor. The steady state power consumption and the linear swing signal of the composite transistor are comparable to a single transistor, whereas presenting very high output impedance. This work also presents two interesting applications for the composite transistor; a 1:1 current mirror and an extremely low power temperature sensor, a thermistor. Both implementations are verified in a standard 0.35-µm TSMC CMOS process. The current mirror presents high output impedance, comparable to the cascode configuration, which is highly desirable to improve gain and PSRR of amplifiers circuits, and mirroring relation in current mirrors.

An ultralow power constant reference current circuit with low temperature dependence for micropower electronic applications is proposed in this paper. This circuit consists of a constant-current subcircuit and a bias-voltage subcircuits, and it compensates for the temperature characteristics of mobility µ, thermal voltage VT, and threshold voltage VTH in such a way that the reference current has small temperature dependence. A SPICE simulation demonstrated that reference current and total power dissipation is 97.7 nA, 1.1 µW, respectively, and the variation in the reference current can be kept very small within 4% in a temperature range from -20 to 100.