IEICE TRANSACTIONS on Electronics
A Compact Model of the Pinch-off Region of 100 nm MOSFETs Based on the Surface-Potential
Summary :
We have developed a model for circuit-simulation which describes the MOSFET region from pinch-off to drain contact based on the surface potential. The model relates the surface-potential increase beyond the pinch-off point to the channel/drain junction profile by applying the Gauss law with the assumption that the lateral field is greater than the vertical one. Explicit equations for the lateral field and the pinch-off length are obtained, which take the potential increase in the drain overlap region into account. The model, as implemented into a circuit simulator, correctly reproduces measured channel conductance and overlap capacitance for 100 nm pocket-implant technologies as a function of bias condition and gate length.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E88-C No.5 pp.1079-1086
- Publication Date
- 2005/05/01
- Publicized
- Online ISSN
- DOI
- 10.1093/ietele/e88-c.5.1079
- Type of Manuscript
- PAPER
- Category
- Semiconductor Materials and Devices
Authors
Dondee NAVARRO
Takeshi MIZOGUCHI
Masami SUETAKE
Kazuya HISAMITSU
Hiroaki UENO
Mitiko MIURA-MATTAUSCH
Hans Jurgen MATTAUSCH
Shigetaka KUMASHIRO
Tetsuya YAMAGUCHI
Kyoji YAMASHITA
Noriaki NAKAYAMA
Keyword
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Dondee NAVARRO, Takeshi MIZOGUCHI, Masami SUETAKE, Kazuya HISAMITSU, Hiroaki UENO, Mitiko MIURA-MATTAUSCH, Hans Jurgen MATTAUSCH, Shigetaka KUMASHIRO, Tetsuya YAMAGUCHI, Kyoji YAMASHITA, Noriaki NAKAYAMA, "A Compact Model of the Pinch-off Region of 100 nm MOSFETs Based on the Surface-Potential" in IEICE TRANSACTIONS on Electronics,
vol. E88-C, no. 5, pp. 1079-1086, May 2005, doi: 10.1093/ietele/e88-c.5.1079.
Abstract: We have developed a model for circuit-simulation which describes the MOSFET region from pinch-off to drain contact based on the surface potential. The model relates the surface-potential increase beyond the pinch-off point to the channel/drain junction profile by applying the Gauss law with the assumption that the lateral field is greater than the vertical one. Explicit equations for the lateral field and the pinch-off length are obtained, which take the potential increase in the drain overlap region into account. The model, as implemented into a circuit simulator, correctly reproduces measured channel conductance and overlap capacitance for 100 nm pocket-implant technologies as a function of bias condition and gate length.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e88-c.5.1079/_p
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@ARTICLE{e88-c_5_1079,
author={Dondee NAVARRO, Takeshi MIZOGUCHI, Masami SUETAKE, Kazuya HISAMITSU, Hiroaki UENO, Mitiko MIURA-MATTAUSCH, Hans Jurgen MATTAUSCH, Shigetaka KUMASHIRO, Tetsuya YAMAGUCHI, Kyoji YAMASHITA, Noriaki NAKAYAMA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Compact Model of the Pinch-off Region of 100 nm MOSFETs Based on the Surface-Potential},
year={2005},
volume={E88-C},
number={5},
pages={1079-1086},
abstract={We have developed a model for circuit-simulation which describes the MOSFET region from pinch-off to drain contact based on the surface potential. The model relates the surface-potential increase beyond the pinch-off point to the channel/drain junction profile by applying the Gauss law with the assumption that the lateral field is greater than the vertical one. Explicit equations for the lateral field and the pinch-off length are obtained, which take the potential increase in the drain overlap region into account. The model, as implemented into a circuit simulator, correctly reproduces measured channel conductance and overlap capacitance for 100 nm pocket-implant technologies as a function of bias condition and gate length.},
keywords={},
doi={10.1093/ietele/e88-c.5.1079},
ISSN={},
month={May},}
Copy
TY - JOUR
TI - A Compact Model of the Pinch-off Region of 100 nm MOSFETs Based on the Surface-Potential
T2 - IEICE TRANSACTIONS on Electronics
SP - 1079
EP - 1086
AU - Dondee NAVARRO
AU - Takeshi MIZOGUCHI
AU - Masami SUETAKE
AU - Kazuya HISAMITSU
AU - Hiroaki UENO
AU - Mitiko MIURA-MATTAUSCH
AU - Hans Jurgen MATTAUSCH
AU - Shigetaka KUMASHIRO
AU - Tetsuya YAMAGUCHI
AU - Kyoji YAMASHITA
AU - Noriaki NAKAYAMA
PY - 2005
DO - 10.1093/ietele/e88-c.5.1079
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E88-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 2005
AB - We have developed a model for circuit-simulation which describes the MOSFET region from pinch-off to drain contact based on the surface potential. The model relates the surface-potential increase beyond the pinch-off point to the channel/drain junction profile by applying the Gauss law with the assumption that the lateral field is greater than the vertical one. Explicit equations for the lateral field and the pinch-off length are obtained, which take the potential increase in the drain overlap region into account. The model, as implemented into a circuit simulator, correctly reproduces measured channel conductance and overlap capacitance for 100 nm pocket-implant technologies as a function of bias condition and gate length.
ER -
English
