Sleep transistors such as MTCMOS and SCCMOS drastically reduce leakage current, but their ON resistances cause significant performance degradation. Larger sleep transistors reduce their ON resistances, but increase leakage current in a sleep mode. Decoupling capacitors beside sleep transistors reduce leakage current. Experimental results show that PMOS SCCMOS with a 4 pF decoupling capacitor reduces leakage current by 1/673 on a 64 bit adder in a 90 nm process.
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Kazutoshi KOBAYASHI, Akihiko HIGUCHI, Hidetoshi ONODERA, "A Leakage Reduction Scheme for Sleep Transistors with Decoupling Capacitors in the Deep Submicron Era" in IEICE TRANSACTIONS on Electronics,
vol. E89-C, no. 6, pp. 838-843, June 2006, doi: 10.1093/ietele/e89-c.6.838.
Abstract: Sleep transistors such as MTCMOS and SCCMOS drastically reduce leakage current, but their ON resistances cause significant performance degradation. Larger sleep transistors reduce their ON resistances, but increase leakage current in a sleep mode. Decoupling capacitors beside sleep transistors reduce leakage current. Experimental results show that PMOS SCCMOS with a 4 pF decoupling capacitor reduces leakage current by 1/673 on a 64 bit adder in a 90 nm process.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e89-c.6.838/_p
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@ARTICLE{e89-c_6_838,
author={Kazutoshi KOBAYASHI, Akihiko HIGUCHI, Hidetoshi ONODERA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Leakage Reduction Scheme for Sleep Transistors with Decoupling Capacitors in the Deep Submicron Era},
year={2006},
volume={E89-C},
number={6},
pages={838-843},
abstract={Sleep transistors such as MTCMOS and SCCMOS drastically reduce leakage current, but their ON resistances cause significant performance degradation. Larger sleep transistors reduce their ON resistances, but increase leakage current in a sleep mode. Decoupling capacitors beside sleep transistors reduce leakage current. Experimental results show that PMOS SCCMOS with a 4 pF decoupling capacitor reduces leakage current by 1/673 on a 64 bit adder in a 90 nm process.},
keywords={},
doi={10.1093/ietele/e89-c.6.838},
ISSN={1745-1353},
month={June},}
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TY - JOUR
TI - A Leakage Reduction Scheme for Sleep Transistors with Decoupling Capacitors in the Deep Submicron Era
T2 - IEICE TRANSACTIONS on Electronics
SP - 838
EP - 843
AU - Kazutoshi KOBAYASHI
AU - Akihiko HIGUCHI
AU - Hidetoshi ONODERA
PY - 2006
DO - 10.1093/ietele/e89-c.6.838
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E89-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2006
AB - Sleep transistors such as MTCMOS and SCCMOS drastically reduce leakage current, but their ON resistances cause significant performance degradation. Larger sleep transistors reduce their ON resistances, but increase leakage current in a sleep mode. Decoupling capacitors beside sleep transistors reduce leakage current. Experimental results show that PMOS SCCMOS with a 4 pF decoupling capacitor reduces leakage current by 1/673 on a 64 bit adder in a 90 nm process.
ER -