IEICE TRANSACTIONS on Electronics
A Triple-Band WCDMA Direct Conversion Receiver IC with Reduced Number of Off-Chip Components and Digital Baseband Control Signals
Summary :
This paper presents a triple-band WCDMA direct conversion receiver (DCR) IC that needs a small number of off-chip components and control signals from digital baseband (DBB) IC. The DCR IC consists of 3 quadrature demodulators (QDEMs) with on-chip impedance matching circuit and an analog baseband block (ABB) that contains a low-pass filter (LPF) with fc automatic tuning circuit using no off-chip components and a linear-in-dB variable-gain amplifier (VGA) with on-chip analog high-pass filter (HPF). In order to make use of DBB control-free DC offset canceler, the DCR is designed to avoid large gain change under large interference that causes long transient response. In order to realize that characteristic without increasing quiescent current, the QDEM is used that employs class AB input stage and low-noise common mode feedback (CMFB) output stage. The DCR IC was fabricated in a SiGe BiCMOS process and occupies about 2.9 mm
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E91-C No.6 pp.837-843
- Publication Date
- 2008/06/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1093/ietele/e91-c.6.837
- Type of Manuscript
- Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
- Category
Authors
Keyword
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Osamu WATANABE, Rui ITO, Toshiya MITOMO, Shigehito SAIGUSA, Tadashi ARAI, Takehiko TOYODA, "A Triple-Band WCDMA Direct Conversion Receiver IC with Reduced Number of Off-Chip Components and Digital Baseband Control Signals" in IEICE TRANSACTIONS on Electronics,
vol. E91-C, no. 6, pp. 837-843, June 2008, doi: 10.1093/ietele/e91-c.6.837.
Abstract: This paper presents a triple-band WCDMA direct conversion receiver (DCR) IC that needs a small number of off-chip components and control signals from digital baseband (DBB) IC. The DCR IC consists of 3 quadrature demodulators (QDEMs) with on-chip impedance matching circuit and an analog baseband block (ABB) that contains a low-pass filter (LPF) with fc automatic tuning circuit using no off-chip components and a linear-in-dB variable-gain amplifier (VGA) with on-chip analog high-pass filter (HPF). In order to make use of DBB control-free DC offset canceler, the DCR is designed to avoid large gain change under large interference that causes long transient response. In order to realize that characteristic without increasing quiescent current, the QDEM is used that employs class AB input stage and low-noise common mode feedback (CMFB) output stage. The DCR IC was fabricated in a SiGe BiCMOS process and occupies about 2.9 mm
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e91-c.6.837/_p
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@ARTICLE{e91-c_6_837,
author={Osamu WATANABE, Rui ITO, Toshiya MITOMO, Shigehito SAIGUSA, Tadashi ARAI, Takehiko TOYODA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Triple-Band WCDMA Direct Conversion Receiver IC with Reduced Number of Off-Chip Components and Digital Baseband Control Signals},
year={2008},
volume={E91-C},
number={6},
pages={837-843},
abstract={This paper presents a triple-band WCDMA direct conversion receiver (DCR) IC that needs a small number of off-chip components and control signals from digital baseband (DBB) IC. The DCR IC consists of 3 quadrature demodulators (QDEMs) with on-chip impedance matching circuit and an analog baseband block (ABB) that contains a low-pass filter (LPF) with fc automatic tuning circuit using no off-chip components and a linear-in-dB variable-gain amplifier (VGA) with on-chip analog high-pass filter (HPF). In order to make use of DBB control-free DC offset canceler, the DCR is designed to avoid large gain change under large interference that causes long transient response. In order to realize that characteristic without increasing quiescent current, the QDEM is used that employs class AB input stage and low-noise common mode feedback (CMFB) output stage. The DCR IC was fabricated in a SiGe BiCMOS process and occupies about 2.9 mm
keywords={},
doi={10.1093/ietele/e91-c.6.837},
ISSN={1745-1353},
month={June},}
Copy
TY - JOUR
TI - A Triple-Band WCDMA Direct Conversion Receiver IC with Reduced Number of Off-Chip Components and Digital Baseband Control Signals
T2 - IEICE TRANSACTIONS on Electronics
SP - 837
EP - 843
AU - Osamu WATANABE
AU - Rui ITO
AU - Toshiya MITOMO
AU - Shigehito SAIGUSA
AU - Tadashi ARAI
AU - Takehiko TOYODA
PY - 2008
DO - 10.1093/ietele/e91-c.6.837
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E91-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2008
AB - This paper presents a triple-band WCDMA direct conversion receiver (DCR) IC that needs a small number of off-chip components and control signals from digital baseband (DBB) IC. The DCR IC consists of 3 quadrature demodulators (QDEMs) with on-chip impedance matching circuit and an analog baseband block (ABB) that contains a low-pass filter (LPF) with fc automatic tuning circuit using no off-chip components and a linear-in-dB variable-gain amplifier (VGA) with on-chip analog high-pass filter (HPF). In order to make use of DBB control-free DC offset canceler, the DCR is designed to avoid large gain change under large interference that causes long transient response. In order to realize that characteristic without increasing quiescent current, the QDEM is used that employs class AB input stage and low-noise common mode feedback (CMFB) output stage. The DCR IC was fabricated in a SiGe BiCMOS process and occupies about 2.9 mm
ER -
English
