Investigation on High-Speed Performance of 0.1-µm-Gate, Ultrathin-Film CMOS/SIMOX
Summary :
A 0.1-µm-gate CMOS/SIMOX has been successfully fabricated using high quality SIMOX substrates. The propagation delay time for the 0.1-µm-gate CMOS/SIMOX is not so noticeable due to the parasitic resistance of the source and drain regions. We anticipate 0.1-µm-gate CMOS/SIMOX devices with a delay time of less than 20 ps at a supply voltage of 1.5 V by reducing the remaining parasitic resistance and capacitances.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E75-C No.12 pp.1491-1497
- Publication Date
- 1992/12/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Issue on SOI (Si on Insulator) Devices)
- Category
- Deep Sub-micron SOI CMOS
Authors
Keyword
CMOS, SOI, SIMOX, ultrathin, high speed
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Yasuhisa OMURA, Sadao NAKASHIMA, Katsutoshi IZUMI, "Investigation on High-Speed Performance of 0.1-µm-Gate, Ultrathin-Film CMOS/SIMOX" in IEICE TRANSACTIONS on Electronics,
vol. E75-C, no. 12, pp. 1491-1497, December 1992, doi: .
Abstract: A 0.1-µm-gate CMOS/SIMOX has been successfully fabricated using high quality SIMOX substrates. The propagation delay time for the 0.1-µm-gate CMOS/SIMOX is not so noticeable due to the parasitic resistance of the source and drain regions. We anticipate 0.1-µm-gate CMOS/SIMOX devices with a delay time of less than 20 ps at a supply voltage of 1.5 V by reducing the remaining parasitic resistance and capacitances.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e75-c_12_1491/_p
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@ARTICLE{e75-c_12_1491,
author={Yasuhisa OMURA, Sadao NAKASHIMA, Katsutoshi IZUMI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Investigation on High-Speed Performance of 0.1-µm-Gate, Ultrathin-Film CMOS/SIMOX},
year={1992},
volume={E75-C},
number={12},
pages={1491-1497},
abstract={A 0.1-µm-gate CMOS/SIMOX has been successfully fabricated using high quality SIMOX substrates. The propagation delay time for the 0.1-µm-gate CMOS/SIMOX is not so noticeable due to the parasitic resistance of the source and drain regions. We anticipate 0.1-µm-gate CMOS/SIMOX devices with a delay time of less than 20 ps at a supply voltage of 1.5 V by reducing the remaining parasitic resistance and capacitances.},
keywords={},
doi={},
ISSN={},
month={December},}
Copy
TY - JOUR
TI - Investigation on High-Speed Performance of 0.1-µm-Gate, Ultrathin-Film CMOS/SIMOX
T2 - IEICE TRANSACTIONS on Electronics
SP - 1491
EP - 1497
AU - Yasuhisa OMURA
AU - Sadao NAKASHIMA
AU - Katsutoshi IZUMI
PY - 1992
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E75-C
IS - 12
JA - IEICE TRANSACTIONS on Electronics
Y1 - December 1992
AB - A 0.1-µm-gate CMOS/SIMOX has been successfully fabricated using high quality SIMOX substrates. The propagation delay time for the 0.1-µm-gate CMOS/SIMOX is not so noticeable due to the parasitic resistance of the source and drain regions. We anticipate 0.1-µm-gate CMOS/SIMOX devices with a delay time of less than 20 ps at a supply voltage of 1.5 V by reducing the remaining parasitic resistance and capacitances.
ER -
English
