IEICE TRANSACTIONS on Electronics
Evaluation of Fixed Charge and Interface Trap Densities in SIMOX Wafers and Their Effects on Device Characteristics
Summary :
The buried oxide nonintegrities, represented as the equivalent fixed oxide charge and interface trap densities at both the upper and lower interface of buried oxide, are evaluated for low-dose and high-dose SIMOX wafers, and their effects on device characteristics are investigated. The equivalent fixied oxide charge and trap densities at the lower interface, which are measured with buried oxide capacitors, are negligibly small in as-fabricated SIMOX wafers. This result enables us to make an analytical model of the parasitic drain/source-to-substrate capacitance in an SOI MOSFET, in which the effect of the depletion layer under the buried oxide is considered. The influence of thinner buried oxide and process-induced fixed oxide charge on the parasitic capacitance is explored with this model. The equivalent fixed oxide charge and trap densities at the upper interface are evaluated by the threshold voltage measurement in an SOI NMOSFET. The principle of this evaluation as well as the experimental technique are described in detail. The oxide charge and trap densities at the upper interface are higher than those at the lower interface for both SIMOX wafers. With a new model of the subthreshold slope based on a two-dimensional potential analysis the influence of the trap at the upper interface is discussed.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E78-C No.9 pp.1263-1272
- Publication Date
- 1995/09/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- PAPER
- Category
- Integrated Electronics
Authors
Keyword
Latest Issue
Copyrights notice of machine-translated contents
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Cite this
Copy
Shoichi MASUI, Tatsuo NAKAJIMA, Keisuke KAWAMURA, Takayuki YANO, Isao HAMAGUCHI, Masaharu TACHIMORI, "Evaluation of Fixed Charge and Interface Trap Densities in SIMOX Wafers and Their Effects on Device Characteristics" in IEICE TRANSACTIONS on Electronics,
vol. E78-C, no. 9, pp. 1263-1272, September 1995, doi: .
Abstract: The buried oxide nonintegrities, represented as the equivalent fixed oxide charge and interface trap densities at both the upper and lower interface of buried oxide, are evaluated for low-dose and high-dose SIMOX wafers, and their effects on device characteristics are investigated. The equivalent fixied oxide charge and trap densities at the lower interface, which are measured with buried oxide capacitors, are negligibly small in as-fabricated SIMOX wafers. This result enables us to make an analytical model of the parasitic drain/source-to-substrate capacitance in an SOI MOSFET, in which the effect of the depletion layer under the buried oxide is considered. The influence of thinner buried oxide and process-induced fixed oxide charge on the parasitic capacitance is explored with this model. The equivalent fixed oxide charge and trap densities at the upper interface are evaluated by the threshold voltage measurement in an SOI NMOSFET. The principle of this evaluation as well as the experimental technique are described in detail. The oxide charge and trap densities at the upper interface are higher than those at the lower interface for both SIMOX wafers. With a new model of the subthreshold slope based on a two-dimensional potential analysis the influence of the trap at the upper interface is discussed.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e78-c_9_1263/_p
Copy
@ARTICLE{e78-c_9_1263,
author={Shoichi MASUI, Tatsuo NAKAJIMA, Keisuke KAWAMURA, Takayuki YANO, Isao HAMAGUCHI, Masaharu TACHIMORI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Evaluation of Fixed Charge and Interface Trap Densities in SIMOX Wafers and Their Effects on Device Characteristics},
year={1995},
volume={E78-C},
number={9},
pages={1263-1272},
abstract={The buried oxide nonintegrities, represented as the equivalent fixed oxide charge and interface trap densities at both the upper and lower interface of buried oxide, are evaluated for low-dose and high-dose SIMOX wafers, and their effects on device characteristics are investigated. The equivalent fixied oxide charge and trap densities at the lower interface, which are measured with buried oxide capacitors, are negligibly small in as-fabricated SIMOX wafers. This result enables us to make an analytical model of the parasitic drain/source-to-substrate capacitance in an SOI MOSFET, in which the effect of the depletion layer under the buried oxide is considered. The influence of thinner buried oxide and process-induced fixed oxide charge on the parasitic capacitance is explored with this model. The equivalent fixed oxide charge and trap densities at the upper interface are evaluated by the threshold voltage measurement in an SOI NMOSFET. The principle of this evaluation as well as the experimental technique are described in detail. The oxide charge and trap densities at the upper interface are higher than those at the lower interface for both SIMOX wafers. With a new model of the subthreshold slope based on a two-dimensional potential analysis the influence of the trap at the upper interface is discussed.},
keywords={},
doi={},
ISSN={},
month={September},}
Copy
TY - JOUR
TI - Evaluation of Fixed Charge and Interface Trap Densities in SIMOX Wafers and Their Effects on Device Characteristics
T2 - IEICE TRANSACTIONS on Electronics
SP - 1263
EP - 1272
AU - Shoichi MASUI
AU - Tatsuo NAKAJIMA
AU - Keisuke KAWAMURA
AU - Takayuki YANO
AU - Isao HAMAGUCHI
AU - Masaharu TACHIMORI
PY - 1995
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E78-C
IS - 9
JA - IEICE TRANSACTIONS on Electronics
Y1 - September 1995
AB - The buried oxide nonintegrities, represented as the equivalent fixed oxide charge and interface trap densities at both the upper and lower interface of buried oxide, are evaluated for low-dose and high-dose SIMOX wafers, and their effects on device characteristics are investigated. The equivalent fixied oxide charge and trap densities at the lower interface, which are measured with buried oxide capacitors, are negligibly small in as-fabricated SIMOX wafers. This result enables us to make an analytical model of the parasitic drain/source-to-substrate capacitance in an SOI MOSFET, in which the effect of the depletion layer under the buried oxide is considered. The influence of thinner buried oxide and process-induced fixed oxide charge on the parasitic capacitance is explored with this model. The equivalent fixed oxide charge and trap densities at the upper interface are evaluated by the threshold voltage measurement in an SOI NMOSFET. The principle of this evaluation as well as the experimental technique are described in detail. The oxide charge and trap densities at the upper interface are higher than those at the lower interface for both SIMOX wafers. With a new model of the subthreshold slope based on a two-dimensional potential analysis the influence of the trap at the upper interface is discussed.
ER -
English
