IEICE TRANSACTIONS on Electronics
A 1.2-V Feedforward Amplifier and A/D Converter for Mixed Analog/Digital LSIs
Summary :
Very-low-voltage 1.2-V mixed-signal CMOS technology is a device/circuit solution aimed at ultra-low-power portable systems such as digital cellular terminals and PDAs. We have developed an experimental 1.2-V mixed analog and digital LSI circuit/device technology. This technology is based on a new transistor structure that has a 0.3-µm gate length and a low Vth of 0.4 V, and that suppresses the short-channel effect. In this paper, we will mainly discuss low-voltage analog circuit design that uses this technology. We show that low Vth is essential not only to digital circuits, but also to 1.2-V analog amplifier, A/D converter and analog switch designs. To achieve high-conversion rate A/D converters, a pipeline architecture is used for low-voltage operation. To increase the attainable gain-bandwidth of the operational amplifier of the converter, a feedforward phase-compensated three-stage amplifier is proposed. The addition of a feedforward capacitor allows a high frequency signal to pass directly to the second stage, which optimizes use of the second stage bandwidth. Pole-zero canceling is used to achieve a fast settling of the amplifier. Although gain precision is degraded by the positive feedback through the feedforward capacitor, this can be offset by increasing the equivalent second-stage gain with an inner feedforward compensated amplifier. The gain-bandwidth of the proposed double feedforward amplifier is two to three times wider than with the conventional Miller compensation. With these techniques, we used 1.2-V mixed-signal CMOS technology to create a basic logic gate with a 400-ps delay and 0.4-µW/MHz power, and a 9-bit 2-Msample/s pipeline A/D converter with power dissipation of only 4 mW.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E79-C No.12 pp.1666-1678
- Publication Date
- 1996/12/25
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Issue on Low-Power LSI Technologies)
- Category
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Tatsuji MATSUURA, Eiki IMAIZUMI, Takanobu ANBO, "A 1.2-V Feedforward Amplifier and A/D Converter for Mixed Analog/Digital LSIs" in IEICE TRANSACTIONS on Electronics,
vol. E79-C, no. 12, pp. 1666-1678, December 1996, doi: .
Abstract: Very-low-voltage 1.2-V mixed-signal CMOS technology is a device/circuit solution aimed at ultra-low-power portable systems such as digital cellular terminals and PDAs. We have developed an experimental 1.2-V mixed analog and digital LSI circuit/device technology. This technology is based on a new transistor structure that has a 0.3-µm gate length and a low Vth of 0.4 V, and that suppresses the short-channel effect. In this paper, we will mainly discuss low-voltage analog circuit design that uses this technology. We show that low Vth is essential not only to digital circuits, but also to 1.2-V analog amplifier, A/D converter and analog switch designs. To achieve high-conversion rate A/D converters, a pipeline architecture is used for low-voltage operation. To increase the attainable gain-bandwidth of the operational amplifier of the converter, a feedforward phase-compensated three-stage amplifier is proposed. The addition of a feedforward capacitor allows a high frequency signal to pass directly to the second stage, which optimizes use of the second stage bandwidth. Pole-zero canceling is used to achieve a fast settling of the amplifier. Although gain precision is degraded by the positive feedback through the feedforward capacitor, this can be offset by increasing the equivalent second-stage gain with an inner feedforward compensated amplifier. The gain-bandwidth of the proposed double feedforward amplifier is two to three times wider than with the conventional Miller compensation. With these techniques, we used 1.2-V mixed-signal CMOS technology to create a basic logic gate with a 400-ps delay and 0.4-µW/MHz power, and a 9-bit 2-Msample/s pipeline A/D converter with power dissipation of only 4 mW.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e79-c_12_1666/_p
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@ARTICLE{e79-c_12_1666,
author={Tatsuji MATSUURA, Eiki IMAIZUMI, Takanobu ANBO, },
journal={IEICE TRANSACTIONS on Electronics},
title={A 1.2-V Feedforward Amplifier and A/D Converter for Mixed Analog/Digital LSIs},
year={1996},
volume={E79-C},
number={12},
pages={1666-1678},
abstract={Very-low-voltage 1.2-V mixed-signal CMOS technology is a device/circuit solution aimed at ultra-low-power portable systems such as digital cellular terminals and PDAs. We have developed an experimental 1.2-V mixed analog and digital LSI circuit/device technology. This technology is based on a new transistor structure that has a 0.3-µm gate length and a low Vth of 0.4 V, and that suppresses the short-channel effect. In this paper, we will mainly discuss low-voltage analog circuit design that uses this technology. We show that low Vth is essential not only to digital circuits, but also to 1.2-V analog amplifier, A/D converter and analog switch designs. To achieve high-conversion rate A/D converters, a pipeline architecture is used for low-voltage operation. To increase the attainable gain-bandwidth of the operational amplifier of the converter, a feedforward phase-compensated three-stage amplifier is proposed. The addition of a feedforward capacitor allows a high frequency signal to pass directly to the second stage, which optimizes use of the second stage bandwidth. Pole-zero canceling is used to achieve a fast settling of the amplifier. Although gain precision is degraded by the positive feedback through the feedforward capacitor, this can be offset by increasing the equivalent second-stage gain with an inner feedforward compensated amplifier. The gain-bandwidth of the proposed double feedforward amplifier is two to three times wider than with the conventional Miller compensation. With these techniques, we used 1.2-V mixed-signal CMOS technology to create a basic logic gate with a 400-ps delay and 0.4-µW/MHz power, and a 9-bit 2-Msample/s pipeline A/D converter with power dissipation of only 4 mW.},
keywords={},
doi={},
ISSN={},
month={December},}
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TY - JOUR
TI - A 1.2-V Feedforward Amplifier and A/D Converter for Mixed Analog/Digital LSIs
T2 - IEICE TRANSACTIONS on Electronics
SP - 1666
EP - 1678
AU - Tatsuji MATSUURA
AU - Eiki IMAIZUMI
AU - Takanobu ANBO
PY - 1996
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E79-C
IS - 12
JA - IEICE TRANSACTIONS on Electronics
Y1 - December 1996
AB - Very-low-voltage 1.2-V mixed-signal CMOS technology is a device/circuit solution aimed at ultra-low-power portable systems such as digital cellular terminals and PDAs. We have developed an experimental 1.2-V mixed analog and digital LSI circuit/device technology. This technology is based on a new transistor structure that has a 0.3-µm gate length and a low Vth of 0.4 V, and that suppresses the short-channel effect. In this paper, we will mainly discuss low-voltage analog circuit design that uses this technology. We show that low Vth is essential not only to digital circuits, but also to 1.2-V analog amplifier, A/D converter and analog switch designs. To achieve high-conversion rate A/D converters, a pipeline architecture is used for low-voltage operation. To increase the attainable gain-bandwidth of the operational amplifier of the converter, a feedforward phase-compensated three-stage amplifier is proposed. The addition of a feedforward capacitor allows a high frequency signal to pass directly to the second stage, which optimizes use of the second stage bandwidth. Pole-zero canceling is used to achieve a fast settling of the amplifier. Although gain precision is degraded by the positive feedback through the feedforward capacitor, this can be offset by increasing the equivalent second-stage gain with an inner feedforward compensated amplifier. The gain-bandwidth of the proposed double feedforward amplifier is two to three times wider than with the conventional Miller compensation. With these techniques, we used 1.2-V mixed-signal CMOS technology to create a basic logic gate with a 400-ps delay and 0.4-µW/MHz power, and a 9-bit 2-Msample/s pipeline A/D converter with power dissipation of only 4 mW.
ER -
English
