Improvement of Refresh Characteristics by SIMOX Technology for Giga-bit DRAMs

Takaho TANIGAWA; Akira YOSHINO; Hiroki KOGA; Shuichi OHYA

Improvement of Refresh Characteristics by SIMOX Technology for Giga-bit DRAMs

Takaho TANIGAWA, Akira YOSHINO, Hiroki KOGA, Shuichi OHYA

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Stacked capacitor dynamic random access memory(DRAM) cells with both NMOS and PMOS cell transistors(Lg=0.4µm) were fabricated on ultra-thin SIMOX(separation by implantation of oxygen) substrates, and the data retention time was compared with that of a bulk counterpart. A DATA retention time of 550 sec(at 25 ) could be achieved using ultra-thin SIMOX substrates, which is 6 times longer than that using the bulk substrate. A stacked capacitor cell with a PMOS cell transistor on an ultra-thin SIMOX substrate is very attractive and promising for future giga-bit DRAM cells.

Publication: IEICE TRANSACTIONS on Electronics Vol.E79-C No.6 pp.781-786

Publication Date: 1996/06/25

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Type of Manuscript: Special Section PAPER (Special Issue on ULSI Memory Technology)

Category: Dynamic RAMs

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Takaho TANIGAWA, Akira YOSHINO, Hiroki KOGA, Shuichi OHYA, "Improvement of Refresh Characteristics by SIMOX Technology for Giga-bit DRAMs" in IEICE TRANSACTIONS on Electronics, vol. E79-C, no. 6, pp. 781-786, June 1996, doi: .
Abstract: Stacked capacitor dynamic random access memory(DRAM) cells with both NMOS and PMOS cell transistors(Lg=0.4µm) were fabricated on ultra-thin SIMOX(separation by implantation of oxygen) substrates, and the data retention time was compared with that of a bulk counterpart. A DATA retention time of 550 sec(at 25 ) could be achieved using ultra-thin SIMOX substrates, which is 6 times longer than that using the bulk substrate. A stacked capacitor cell with a PMOS cell transistor on an ultra-thin SIMOX substrate is very attractive and promising for future giga-bit DRAM cells.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e79-c_6_781/_p

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@ARTICLE{e79-c_6_781,
author={Takaho TANIGAWA, Akira YOSHINO, Hiroki KOGA, Shuichi OHYA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Improvement of Refresh Characteristics by SIMOX Technology for Giga-bit DRAMs},
year={1996},
volume={E79-C},
number={6},
pages={781-786},
abstract={Stacked capacitor dynamic random access memory(DRAM) cells with both NMOS and PMOS cell transistors(Lg=0.4µm) were fabricated on ultra-thin SIMOX(separation by implantation of oxygen) substrates, and the data retention time was compared with that of a bulk counterpart. A DATA retention time of 550 sec(at 25 ) could be achieved using ultra-thin SIMOX substrates, which is 6 times longer than that using the bulk substrate. A stacked capacitor cell with a PMOS cell transistor on an ultra-thin SIMOX substrate is very attractive and promising for future giga-bit DRAM cells.},
keywords={},
doi={},
ISSN={},
month={June},}

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TY - JOUR
TI - Improvement of Refresh Characteristics by SIMOX Technology for Giga-bit DRAMs
T2 - IEICE TRANSACTIONS on Electronics
SP - 781
EP - 786
AU - Takaho TANIGAWA
AU - Akira YOSHINO
AU - Hiroki KOGA
AU - Shuichi OHYA
PY - 1996
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E79-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 1996
AB - Stacked capacitor dynamic random access memory(DRAM) cells with both NMOS and PMOS cell transistors(Lg=0.4µm) were fabricated on ultra-thin SIMOX(separation by implantation of oxygen) substrates, and the data retention time was compared with that of a bulk counterpart. A DATA retention time of 550 sec(at 25 ) could be achieved using ultra-thin SIMOX substrates, which is 6 times longer than that using the bulk substrate. A stacked capacitor cell with a PMOS cell transistor on an ultra-thin SIMOX substrate is very attractive and promising for future giga-bit DRAM cells.
ER -