An emitter coupled logic (ECL) compatible low-power GaAs 8:1 multiplexer (MUX) and 1:8 demultiplexer (DEMUX) for 10-Gb/s optical communication systems has been developed. In order to decrease the power consumption and to maximize the timing margin, we estimated the power consumption for direct-coupled FET logic (DCFL) and source-coupled FET logic (SCFL) circuits in terms of the D-type flip-flop (D-FF) operating speed and the duty-ratio variation. Based on the result, we used SCFL circuits in the clock-generating circuit and the circuits operating at 10 Gb/s, and we used DCFL circuits in the circuits operating below 5 Gb/s. These ICs, which are mounted on ceramic packages, operate at up to 10 Gb/s with power consumption of 1.2 W for the 8:1 MUX and 1.0 W for the 1:8 DEMUX. This is the lowest power consumption yet reported for 10-Gb/s 8:1 MUX and 1:8 DEMUX.
Nobuhide YOSHIDA
Masahiro FUJII
Takao ATSUMO
Keiichi NUMATA
Shuji ASAI
Michihisa KOHNO
Hirokazu OIKAWA
Hiroaki TSUTSUI
Tadashi MAEDA
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Nobuhide YOSHIDA, Masahiro FUJII, Takao ATSUMO, Keiichi NUMATA, Shuji ASAI, Michihisa KOHNO, Hirokazu OIKAWA, Hiroaki TSUTSUI, Tadashi MAEDA, "ECL-Compatible Low-Power-Consumption 10-Gb/s GaAs 8:1 Multiplexer and 1:8 Demultiplexer" in IEICE TRANSACTIONS on Electronics,
vol. E82-C, no. 11, pp. 1992-1999, November 1999, doi: .
Abstract: An emitter coupled logic (ECL) compatible low-power GaAs 8:1 multiplexer (MUX) and 1:8 demultiplexer (DEMUX) for 10-Gb/s optical communication systems has been developed. In order to decrease the power consumption and to maximize the timing margin, we estimated the power consumption for direct-coupled FET logic (DCFL) and source-coupled FET logic (SCFL) circuits in terms of the D-type flip-flop (D-FF) operating speed and the duty-ratio variation. Based on the result, we used SCFL circuits in the clock-generating circuit and the circuits operating at 10 Gb/s, and we used DCFL circuits in the circuits operating below 5 Gb/s. These ICs, which are mounted on ceramic packages, operate at up to 10 Gb/s with power consumption of 1.2 W for the 8:1 MUX and 1.0 W for the 1:8 DEMUX. This is the lowest power consumption yet reported for 10-Gb/s 8:1 MUX and 1:8 DEMUX.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e82-c_11_1992/_p
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@ARTICLE{e82-c_11_1992,
author={Nobuhide YOSHIDA, Masahiro FUJII, Takao ATSUMO, Keiichi NUMATA, Shuji ASAI, Michihisa KOHNO, Hirokazu OIKAWA, Hiroaki TSUTSUI, Tadashi MAEDA, },
journal={IEICE TRANSACTIONS on Electronics},
title={ECL-Compatible Low-Power-Consumption 10-Gb/s GaAs 8:1 Multiplexer and 1:8 Demultiplexer},
year={1999},
volume={E82-C},
number={11},
pages={1992-1999},
abstract={An emitter coupled logic (ECL) compatible low-power GaAs 8:1 multiplexer (MUX) and 1:8 demultiplexer (DEMUX) for 10-Gb/s optical communication systems has been developed. In order to decrease the power consumption and to maximize the timing margin, we estimated the power consumption for direct-coupled FET logic (DCFL) and source-coupled FET logic (SCFL) circuits in terms of the D-type flip-flop (D-FF) operating speed and the duty-ratio variation. Based on the result, we used SCFL circuits in the clock-generating circuit and the circuits operating at 10 Gb/s, and we used DCFL circuits in the circuits operating below 5 Gb/s. These ICs, which are mounted on ceramic packages, operate at up to 10 Gb/s with power consumption of 1.2 W for the 8:1 MUX and 1.0 W for the 1:8 DEMUX. This is the lowest power consumption yet reported for 10-Gb/s 8:1 MUX and 1:8 DEMUX.},
keywords={},
doi={},
ISSN={},
month={November},}
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TY - JOUR
TI - ECL-Compatible Low-Power-Consumption 10-Gb/s GaAs 8:1 Multiplexer and 1:8 Demultiplexer
T2 - IEICE TRANSACTIONS on Electronics
SP - 1992
EP - 1999
AU - Nobuhide YOSHIDA
AU - Masahiro FUJII
AU - Takao ATSUMO
AU - Keiichi NUMATA
AU - Shuji ASAI
AU - Michihisa KOHNO
AU - Hirokazu OIKAWA
AU - Hiroaki TSUTSUI
AU - Tadashi MAEDA
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E82-C
IS - 11
JA - IEICE TRANSACTIONS on Electronics
Y1 - November 1999
AB - An emitter coupled logic (ECL) compatible low-power GaAs 8:1 multiplexer (MUX) and 1:8 demultiplexer (DEMUX) for 10-Gb/s optical communication systems has been developed. In order to decrease the power consumption and to maximize the timing margin, we estimated the power consumption for direct-coupled FET logic (DCFL) and source-coupled FET logic (SCFL) circuits in terms of the D-type flip-flop (D-FF) operating speed and the duty-ratio variation. Based on the result, we used SCFL circuits in the clock-generating circuit and the circuits operating at 10 Gb/s, and we used DCFL circuits in the circuits operating below 5 Gb/s. These ICs, which are mounted on ceramic packages, operate at up to 10 Gb/s with power consumption of 1.2 W for the 8:1 MUX and 1.0 W for the 1:8 DEMUX. This is the lowest power consumption yet reported for 10-Gb/s 8:1 MUX and 1:8 DEMUX.
ER -