The search functionality is under construction.
The search functionality is under construction.

IEICE TRANSACTIONS on Electronics

  • Impact Factor

    0.63

  • Eigenfactor

    0.002

  • article influence

    0.1

  • Cite Score

    1.3

Advance publication (published online immediately after acceptance)

Volume E82-C No.11  (Publication Date:1999/11/25)

    Special Issue on High-Frequency/High-Speed Devices for Information and Communication Systems in the 21st Century
  • FOREWORD

    Daisuke UEDA  

     
    FOREWORD

      Page(s):
    1861-1861
  • High-Frequency and High-Speed Devices for Communication Network Systems

    Yasutake HIRACHI  

     
    INVITED PAPER-Information and Communication System

      Page(s):
    1862-1870

    A description for high-speed communication networks for the 21st century is roughly sketched, and the technical development trends in high-frequency and high-speed devices are briefly forecasted. Four examples of devices under development are reported: 76-GHz flip-chip MMIC's for car-radar systems, a cost-effective RF module for millimeter-wave wireless systems, a 10-Gbps demultiplexer for optical fiber communication systems, and a GaAs microwave signal processor for active phased-array systems. Considering as technological trends evolve further, this paper also introduces the software radio concept and the fusion of wireless and optical technologies for cost-effective wireless communication equipment and end-user services.

  • Third-Generation Mobile Telecommunication System

    Fumio SUZUKI  Hideshi TAKI  

     
    INVITED PAPER-Information and Communication System

      Page(s):
    1871-1878

    Mobile communication services have become popular due to the rapid popularization of cellular mobile telephones. In order to offer services to an increasing number of users and to upgrade services, the development of Third-Generation Mobile Telecommunication is required. Our proposed system utilizing W-CDMA enables high-speed variable data communications, uninterrupted hand-over between communication zones, doubling of subscriber capacity and reduction of operation costs. Various actions are being taken internationally toward the establishment of a global standard for the Third-Generation Mobile Telecommunication System, aiming at its practical application around AD 2000. The W-CDMA system has been adopted as the standard for Japan. We are developing experimental W-CDMA system equipment. For this development, many Field Programmable Gate Array (FPGA) devices and Digital Signal Processors (DSP) have been used to meet the changes of equipment specifications and system evaluation parameters. By developing customized Large-scale Integrated circuit (LSI) devices and high-speed DSP, a small-size portable phone and a compact visual phone have been realized. Also, high-density mounting of the signal processing parts has been done in the Base Transceiver Station (BTS). In the development of a Mobile Communication Controller Simulator (MCC-SIM), the developmental period has been shortened by using our ATM switching system (AD8700) and generic-use PBX (Pana EXA) in the proposed system. In this paper, the features of the W-CDMA system and the outline of the newly developed experimental equipment have been described.

  • InP-Based Lightwave Communication ICs for 40 Gbit/s and Beyond

    Eiichi SANO  Yasuro YAMANE  

     
    INVITED PAPER-Information and Communication System

      Page(s):
    1879-1885

    Ultrahigh-speed integrated-circuit technology is one of the keys to achieving ultralarge-capacity optical communication systems. Technological breakthroughs in circuit and packaging design as well as improved transistor performance are needed to reach the over-40-Gbit/s operating region. This paper describes a 0.1-µm gate InP HEMT, novel circuit design, and broadband packaging technologies developed to boost the circuit speed. We used these technologies to make 40-Gbit/s lightwave communication ICs. This paper also describes the problems and challenges toward 100-Gbit/s operation.

  • Reliability of AlGaAs and InGaP Heterojunction Bipolar Transistors

    Noren PAN  Roger E. WELSER  Charles R. LUTZ  James ELLIOT  Jesse P. RODRIGUES  

     
    INVITED PAPER-RF Power Devices

      Page(s):
    1886-1894

    Heterojunction bipolar transistors (HBTs) are key devices for a variety of applications including L-band power amplifiers, high speed A/D converters, broadband amplifiers, laser drivers, and low phase noise oscillators. AlGaAs emitter HBTs have demonstrated sufficient reliability for L-band mobile phone applications. For applications which require extended reliability performance at high junction temperatures (>250) and large current densities (>50 kA/cm2), InGaP emitter HBTs are the preferred devices. The excellent reliability of InGaP/GaAs HBTs has been confirmed at various laboratories. At a moderate current density and junction temperature, Jc = 25 kA/cm2 and Tj = 264, no device failures were reported out to 10,000 hours in a sample of 10 devices. Reliability testing performed up to a junction temperature of 360 and at a higher current density (Jc = 60 kA/cm2) showed an extrapolated MTTF of 5 105 hours at Tj = 150. The activation energy for AlGaAs/GaAs HBTs was 0.57 eV, while the activation energy for InGaP/GaAs HBTs was 0.68 eV, which indicated a similar failure mechanism for both devices.

  • GaN-Based FETs for Microwave Power Amplification

    Yi-Feng WU  Bernd P. KELLER  Stacia KELLER  Jane J. XU  Brian J. THIBEAULT  Steven P. DENBAARS  Umesh K. MISHRA  

     
    INVITED PAPER-RF Power Devices

      Page(s):
    1895-1905

    We review advances in GaN-based microwave power field-effect-transistors (FETs). Evolution in device technology included metal-semiconductor-field-effect-transistors (MESFETs), heterostructure-field-effect-transistors (HFETs), modulation-doped-field-effect-transistors (MODFETs) or high-mobility-transistors (HEMT), HEMTs with high Al contents, HEMTs with gate recess and GaN-channel HEMTs grown on SiC substrates. The power density was first reported as 1.1 W/mm at 2 GHz using an AlGaN/GaN HEMT structure grown on sapphire substrate, and was subsequently improved to 1.5-1.7 W/mm at 4-10 GHz by refinement in device structure and processing techniques. This was advanced to 2.6-3.3 W/mm at 8-18 GHz by adopting a high-Al-content AlGaN barrier layer. Success in gate recess helped to further increase the power density of these GaN HEMTs on sapphire substrates to 4.6 W/mm at 6 GHz. Substrate replacement of sapphire by SiC, for excellent thermal dissipation, has boosted performance to 6.9 W/mm at 10 GHz, which is higher than GaAs-based FETs by a factor of 6. Device periphery was scaled up to obtain high total output power. On one hand, GaN HEMTs on sapphire, using a flip-chip bonding technology for thermal management, have generated 7.6 W at 4 GHz. On another hand, GaN HEMTs on SiC, taking advantage of the high substrate thermal conductivity, have achieved 9.1 W at 7.4 GHz. Two types of initial GaN-based power amplifiers were also demonstrated using a flip-chip IC scheme. The transistors used were 0.7 to 0.8-µm-long-gate GaN HEMTs. Bandwidths of 1-8 GHz and 3-9 GHz were achieved with gains up to 11.5 dB. The output power levels ranged from 3.2 to 4.6 W using devices with 2 and 3-mm gate peripheries, which were higher than that achievable with GaAs-based HEMTs of the same size by a factor of 2. Traps in the device structure currently limit performance of most GaN FETs. These traps cause dispersion in the I-V characteristics, which increases knee voltage and reduces channel current under RF gate drive. However, they are believed to be not inherent in the GaN semiconductor system and can be minimized as the technology matures.

  • High-Efficiency 0.1 cc Power Amplifier Module for 900 MHz Personal Digital Cellular Telephones

    Akira INOUE  Akira OHTA  Takahiro NAKAMOTO  Shigeki KAGEYAMA  Toshiaki KITANO  Hideaki KATAYAMA  Toshikazu OGATA  Noriyuki TANINO  Kazunao SATO  

     
    PAPER-RF Power Devices

      Page(s):
    1906-1912

    A new harmonic termination that controls the waveform of the drain current to be rectangular is developed for high-efficiency power amplifier modules. Its harmonic termination is a short circuit at the third harmonic and a non-short circuit at the second harmonic. It is found experimentally and confirmed by simulation that the load-matching condition at the third-order harmonic improves the efficiency of a transistor by more than 13%. By using this tuning, 57.7% power-added efficiency of the module is achieved at the output power of 29.9 dBm with ACP of -50 dBc, NACP of -65 dBc at 925 MHz and Vdd of 3.5 V.

  • A GSM900/DCS1800 Dual-Band MMIC Power Amplifier Using Outside-Base/Center-Via-Hole Layout Multifinger HBT

    Kazutomi MORI  Kenichiro CHOUMEI  Teruyuki SHIMURA  Tadashi TAKAGI  Yukio IKEDA  Osami ISHIDA  

     
    PAPER-RF Power Devices

      Page(s):
    1913-1920

    A GSM900/DCS1800 dual-band AlGaAs/GaAs HBT (heterojunction bipolar transistor) MMIC (monolithic microwave integrated circuit) power amplifier has been developed. It includes power amplifiers for GSM900 and DCS1800, constant voltage bias circuits and a d. c. switch. In order to achieve high efficiency, the outside-base/center-via-hole layout is applied to the final-stage HBT of the MMIC amplifier. The layout can realize uniform output load impedance and thermal distribution of each HBT finger. The developed MMIC amplifier could provided output power of 34.5 dBm and power-added efficiency of 53.4% for GSM900, and output power of 32.0 dBm and power-added efficiency of 41.8% for DCS1800.

  • Low Power Dissipation Single-Supply MMIC Power Amplifier for 5.8 GHz Electronic Toll Collection System

    Taketo KUNIHISA  Shinji YAMAMOTO  Masaaki NISHIJIMA  Takahiro YOKOYAMA  Mitsuru NISHITSUJI  Katsunori NISHII  Osamu ISHIKAWA  

     
    PAPER-RF Power Devices

      Page(s):
    1921-1927

    A MMIC power amplifier operating with a single-supply (3.0 V) has been developed for 5.8 GHz Japanese Electronic Toll Collection (ETC) System. The present MMIC contains two FETs, matching circuits (input, intermediate and output matching circuits), and two drain bias circuits. High dielectric constant material SrTiO3 (STO) is used for by-pass and input coupling capacitors. Very small die size of 0.77 mm2 has been realized by using the STO capacitors and negative feedback circuit technology. High 1 dB output gain compression point (P1dB) of 13 dBm, high gain of 21.4 dB and low dissipation current of 41.3 mA have been achieved under 3.0 V single-supply condition.

  • Wide-Band CDMA Distortion Characteristics of an AlGaAs/InGaAs/AlGaAs Heterojunction FET under Various Quiescent Drain Current Operations

    Gary HAU  Takeshi B. NISHIMURA  Naotaka IWATA  

     
    PAPER-RF Power Devices

      Page(s):
    1928-1935

    Wide-band CDMA (W-CDMA) distortion characteristics of a fabricated double-doped heterojunction FET (HJFET) are presented. Measured results demonstrate that the first and second adjacent channel W-CDMA adjacent channel leakage power ratios (ACPRs) of the HJFET are correlated to the third- and fifth-order intermodulation (IM3 and IM5) distortions respectively under various quiescent drain current operation (Iq). A first channel ACPR dip phenomenon is observed under a low Iq condition, resulting in improved power added efficiency. Due to its close correlation to the IM3 distortion, the ACPR dip phenomenon is explained in terms of the similar IM3 characteristic. Simulated results reveal that the dip is a consequence of the cancellation of distortions generated by the third- and fifth-order nonlinearities at the IM3 frequency. The conditions for the cancellation are detailed.

  • A 100 W S-Band AlGaAs/GaAs Heterostructure FET for Base Stations of Wireless Personal Communications

    Seiki GOTO  Kenichi FUJII  Tetsuo KUNII  Satoshi SUZUKI  Hiroshi KAWATA  Shinichi MIYAKUNI  Naohito YOSHIDA  Susumu SAKAMOTO  Takashi FUJIOKA  Noriyuki TANINO  Kazunao SATO  

     
    PAPER-RF Power Devices

      Page(s):
    1936-1942

    A 100 W, low distortion AlGaAs/GaAs heterostructure FET has been developed for CDMA cellular base stations. This FET employs the longest gate finger ever reported of 800 µm to shrink the chip size. The size of the chip and the package are miniaturized to 1.242.6 mm2 and 17.4 24.0 mm2, respectively. The developed FET exhibits 100 W (50 dBm) saturation output power, and 11.5 dB power gain at 1 dB gain compression at 2.1 GHz. The third-order intermodulation distortion and the power-added efficiency under the two-tone test condition (Δf=1 MHz) are -35 dBc and 24%, respectively at 42 dBm output power, that is 8 dB back off from the saturation power.

  • Low-Noise, Low-Power Wireless Frontend MMICs Using SiGe HBTs

    Hermann SCHUMACHER  Uwe ERBEN  Wolfgang DURR  Kai-Boris SCHAD  

     
    INVITED PAPER-Low Power-Consumption RF ICs

      Page(s):
    1943-1950

    Silicon-based monolithic microwave integrated circuits (MMICs) present an interesting option for low-cost consumer wireless systems. SiGe/Si heterojunction bipolar transistors (HBTs) are a major driving force behind Si-based MMICs, because they offer excellent microwave performance without aggressive lateral scaling. This article reviews opportunities for receiver frontend components (low-noise amplifiers and mixers) using SiGe HBTs.

  • Quick Development of Multifunctional MMICs by Using Three-Dimensional Masterslice MMIC Technology

    Ichihiko TOYODA  Makoto HIRANO  Masami TOKUMITSU  Yuhki IMAI  Kenjiro NISHIKAWA  Kenji KAMOGAWA  Suehiro SUGITANI  

     
    INVITED PAPER-Low Power-Consumption RF ICs

      Page(s):
    1951-1959

    A procedure for quickly developing highly integrated multifunctional MMICs by using the three-dimensional masterslice MMIC technology has been developed. The structures and advanced features of this technology, such as miniature transmission lines, a broadside coupler, and miniature function block circuits, enable multifunctional MMICs to be quickly and easily developed. These unique features and basic concept of the masterslice technology are discussed and reviewed to examine the advantages of this technology. As an example of quick MMIC development, an amplifier, a mixer, and a down-converter are fabricated on a newly designed master array.

  • A Novel Layout Optimization Technique for Miniaturization and Accurate Design of MMICs

    Shin CHAKI  Yoshinobu SASAKI  Naoto ANDOH  Yasuharu NAKAJIMA  Kazuo NISHITANI  

     
    INVITED PAPER-Low Power-Consumption RF ICs

      Page(s):
    1960-1967

    This paper describes a novel layout optimization technique using electromagnetic (EM) simulation. Simple equivalent circuits fitted to EM simulation results are employed in this method, to present a modification guide for a layout pattern. Fitting errors are also investigated with some layout patterns in order to clarify the applicable range of the method, because the errors restrict the range. The method has been successfully adopted to an X-band low noise MMIC amplifier (LNA). The layout pattern of the amplifier was optimized in only two days and the amplifier has achieved target performances--a 35 dB gain and a 1.7 dB noise figure--in one development cycle. The effective chip area has been miniaturized to 4.8 mm2. The area could be smaller than 70% in comparison with a conventional layout MMIC.

  • A Technique for Extracting Small-Signal Equivalent-Circuit Elements of HEMTs

    Man-Young JEON  Byung-Gyu KIM  Young-Jin JEON  Yoon-Ha JEONG  

     
    PAPER-Low Power-Consumption RF ICs

      Page(s):
    1968-1976

    We propose a new technique that is able to extract the small-signal equivalent-circuit elements of high electron mobility transistors (HEMTs) without causing any gate degradation. For the determination of extrinsic resistance values, unlike other conventional techniques, the proposed technique does not require an additional relationship for the resistances. For the extraction of extrinsic inductance values, the technique uses the R-estimate, which is known to be more robust relative to the measurement errors than the commonly used least-squares regression. Additionally, we suggest an improved cold HEMT model that seems to be more general than conventional cold HEMT models. With the use of the improved cold HEMT model, the proposed technique extracts the extrinsic resistance and inductance values.

  • High Performance HJFET MMIC with Embedded Gate Technology for Microwave and Millimeter-Wave IC's Using EB Lithography (EMMIE)

    Akio WAKEJIMA  Yoichi MAKINO  Katsumi YAMANOGUCHI  Norihiko SAMOTO  

     
    PAPER-Low Power-Consumption RF ICs

      Page(s):
    1977-1981

    A high gain AlGaAs/InGaAs HJFET has been developed with Embedded gate technology for Microwave and Millimeter-wave IC's using EB lithography (EMMIE). EMMIE consists of a direct SiO2 opening by two-step dry-etching with a chemically amplified resist mask. 0.14 µm gate patterns delineated on 4-inch wafers exhibited a small deviation of 10 nm in Lg and a Vth standard deviation of 55 mV. The optimum distance between the top of the gate and the recess surface (hg) was determined using a two-dimensional device simulator in order to investigate the effect of fringing gate to drain capacitance on the RF gain performance. The fabricated one-stage HJFET MMIC amplifier exhibited extremely high gain performance of 12.4 dB at 76 GHz.

  • An Optimum Bias Point Study of Low Local Oscillator Power Operation for 60 GHz Drain Mixer

    Keiichi YAMAGUCHI  Yasuhiko KURIYAMA  Eiji TAKAGI  Mitsuo KONNO  

     
    PAPER-Low Power-Consumption RF ICs

      Page(s):
    1982-1991

    The optimum bias point for a drain mixer operating on low local oscillator (LO) power was investigated. The bias voltage dependence of the required LO power and the conversion gain in the drain mixer was clarified by a simplified nonlinear model which the drain current characteristics around knee voltage is approximated by two straight line segments. It was found that an optimum gate bias voltage Vgs exists for a given applied LO power, and the optimum gate bias voltage moves toward the pinch-off voltage as the injection LO power level decreases. In order to verify the variation of the optimum gate bias voltage, a 60 GHz MMIC drain mixer adopting the optimum gate bias voltage for low LO power level was fabricated. The fabricated drain mixer exhibited a conversion gain of 0 dB with the injection LO power level of 0 dBm. This value of 0 dBm is the best performance yet obtained for a 60 GHz MMIC drain mixer. The measured optimum gate bias voltage was near the pinch-off voltage. This result was in good agreement with the theoretical analysis. The LO power level of a drain mixer has been improved so that it is on a par with that of a gate mixer.

  • ECL-Compatible Low-Power-Consumption 10-Gb/s GaAs 8:1 Multiplexer and 1:8 Demultiplexer

    Nobuhide YOSHIDA  Masahiro FUJII  Takao ATSUMO  Keiichi NUMATA  Shuji ASAI  Michihisa KOHNO  Hirokazu OIKAWA  Hiroaki TSUTSUI  Tadashi MAEDA  

     
    PAPER-Low Power-Consumption RF ICs

      Page(s):
    1992-1999

    An emitter coupled logic (ECL) compatible low-power GaAs 8:1 multiplexer (MUX) and 1:8 demultiplexer (DEMUX) for 10-Gb/s optical communication systems has been developed. In order to decrease the power consumption and to maximize the timing margin, we estimated the power consumption for direct-coupled FET logic (DCFL) and source-coupled FET logic (SCFL) circuits in terms of the D-type flip-flop (D-FF) operating speed and the duty-ratio variation. Based on the result, we used SCFL circuits in the clock-generating circuit and the circuits operating at 10 Gb/s, and we used DCFL circuits in the circuits operating below 5 Gb/s. These ICs, which are mounted on ceramic packages, operate at up to 10 Gb/s with power consumption of 1.2 W for the 8:1 MUX and 1.0 W for the 1:8 DEMUX. This is the lowest power consumption yet reported for 10-Gb/s 8:1 MUX and 1:8 DEMUX.

  • High-Speed, Low-Power Lightwave Communication ICs Using InP/InGaAs Double-Heterojunction Bipolar Transistors

    Eiichi SANO  Kenji KURISHIMA  Hiroki NAKAJIMA  Shoji YAMAHATA  

     
    PAPER-Low Power-Consumption RF ICs

      Page(s):
    2000-2006

    A wideband, low-power preamplifier and a high-speed, low-power monolithically integrated regenerative receiver are designed and fabricated using small-scale InP/InGaAs DHBTs. The preamplifier has a gain-bandwidth product of 192 GHz with a power dissipation of 51 mW. The regenerative receiver is successfully operated at 20 Gbit/s with a power dissipation of 0.6 W and an input dynamic range of 13 dB. This IC offers the lowest energy ever reported for regenerative receivers. In addition, a 20-Gbit/s optical modulator driver with a driving voltage of 2 V is successfully fabricated. These results demonstrate the feasibility of InP/InGaAs DHBTs for high-speed, low-power lightwave communication ICs.

  • High-Frequency, Low-Noise Si Bipolar Transistor Fabricated Using Self-Aligned Metal/IDP Technology

    Hiromi SHIMAMOTO  Takahiro ONAI  Eiji OHUE  Masamichi TANABE  Katsuyoshi WASHIO  

     
    PAPER-Low Power-Consumption RF ICs

      Page(s):
    2007-2012

    A high-frequency, low-noise silicon bipolar transistor that can be used in over-10 Gb/s optical communication systems and wireless communication systems has been developed. The silicon bipolar transistor was fabricated using self-aligned metal/IDP (SMI) technology, which produces a self-aligned base electrode of stacked layers of metal and in-situ doped poly-Si (IDP) by low-temperature selective tungsten CVD. It provides a low base resistance and high-cutoff frequency. The base resistance is reduced to half that of a transistor with a conventional poly-Si base electrode. By using the SMI technology and optimizing the depth of the emitter and the link base, we achieved the maximum oscillation frequency of 80 GHz, a minimum gate delay in an ECL of 11.6 ps, and the minimum noise figure of 0.34 dB at 2 GHz, which are the highest performances among those obtained from ion-implanted base Si bipolar transistors, and are comparable to those of SiGe base heterojunction bipolar transistors.

  • DC and AC Performances in Selectively Grown SiGe-Base HBTs

    Katsuya ODA  Eiji OHUE  Masamichi TANABE  Hiromi SHIMAMOTO  Katsuyoshi WASHIO  

     
    PAPER-Low Power-Consumption RF ICs

      Page(s):
    2013-2020

    A selectively grown Si1-xGex base heterojunction bipolar transistor (HBT) was fabricated, and effects of Ge and B profiles on the device performance were investigated. Since no obvious leakage current was observed, it is shown that good crystallinity of Si1-xGex was achieved by using a UHV/CVD system with high-pressure H2 pre-cleaning of the substrate. Very high current gain of 29,000 was obtained in an HBT with a uniform Ge profile by both increasing electron injection from the emitter to the base and reducing band gap energy in the base. Since the Early voltage is affected by the grading of Ge content in the base, the HBT with the graded Ge profile provides very high Early voltage. However, the breakdown voltage is degraded by increasing Ge content because of reducing bandgap energy and changing dopant profile. To increase the cutoff frequency, dopant diffusion must be suppressed, and carrier acceleration by the internal drift field with the graded Ge profile has an additional effect. By doing them, an extremely high cutoff frequency of 130 GHz was obtained in HBT with graded Ge profiles.

  • Innovative Packaging and Fabrication Concept for a 28 GHz Communication Front-End

    Wolfgang MENZEL  Jurgen KASSNER  Uhland GOEBEL  

     
    INVITED PAPER-RF Assembly Technology

      Page(s):
    2021-2028

    Millimeter-wave systems increasingly are entering into commercial systems, both for communication and sensors for traffic or industrial applications. In many cases, circuit technology of the involved front-ends includes monolithic and hybrid integrated circuits and even waveguide components like filters or antenna feeds. In addition to the standard technical and environmental requirements, these front-ends have to be fabricated in large quantities at very low cost. After a short review of the problems and some general interconnect and packaging techniques for mm-wave front-ends, achievements of a research program will be presented at the example of components for a 28 GHz communication front-end. Emphasis is put on a novel feed-through structure using multilayer carrier substrates for mm-wave circuits, some advances in electromagnetic field coupling for interconnects to mm-wave MMICs, and the realization of packages including waveguide components by plastic injection molding and electroplating. Results of filters and a diplexer produced in this way are shown, including pretuning of the filters to compensate the shrinking of the plastic parts during cooling.

  • Miniaturized Millimeter-Wave Hybrid IC Technology Using Non-Photosensitive Multi-Layered BCB Thin Films and Stud Bump Bonding

    Kazuaki TAKAHASHI  Hiroshi OGURA  Morikazu SAGAWA  

     
    INVITED PAPER-RF Assembly Technology

      Page(s):
    2029-2037

    This paper describes a new millimeter-wave hybrid integrated circuit (HIC) technology which applies a thin film multi-layered dielectric substrate and flip-chip bonding technology employing stud bump bonding (SBB). We have previously proposed and demonstrated a novel HIC structure, named millimeter-wave flip-chip IC, (MFIC), applying an excellent dielectric material of benzocyclobutene (BCB) thin film and flip-chip bonding. In this paper, an advanced thin film multi-layer process using non-photosensitive BCB was newly developed. Characteristics of the transmission lines and the built-in MIM capacitor within the multi-layered structure were discussed. Furthermore, stud bump bonding was newly adapted to the MFIC as a flip-chip method, and the millimeter-wave characteristics of the bumps were examined. Using these technologies, we demonstrate characteristics of a miniaturized 25 GHz down converter MFIC. Our newly proposed HIC structure enabled us to bring down chip size to less than 1/3 of our conventional structure. Finally, we discuss future possibilities for high performance multi-chip-modules (MCMs) using SBB technology as a further improved HIC for compact millimeter-wave radio equipment.

  • Millimeter-Wave Flip-Chip MMIC Structure with High Performance and High Reliability Interconnects

    Masaharu ITO  Kenichi MARUHASHI  Hideki KUSAMITSU  Yoshiaki MORISHITA  Keiichi OHATA  

     
    PAPER-RF Assembly Technology

      Page(s):
    2038-2043

    The flip-chip structure for millimeter-wave MMICs has been investigated to obtain high performance and high reliability. In our approach, an air gap between the MMIC and the alumina substrate was determined so as not to change electrical characteristics from those of the unflipped MMIC. We calculated the proximity effect between the MMIC and the substrate by using 3D-electromagnetic simulator, and found that the air gap should be controlled to be greater than 20 µm. Since the discontinuity of transmission lines at bump interconnects is not negligible above 60 GHz, we constructed the LCR-equivalent circuit for the bump interconnect and confirmed its validity by comparing measurement with calculation. Based on these investigations, the 60- and 76-GHz-band CPW three-stage low noise amplifiers were successfully mounted on the alumina substrate using a thermal compression bonding process. The gain of the flipped 60- and 76-GHz-band MMICs are greater than 18 dB at around 60 GHz and 17 dB at around 76 GHz, respectively. The noise figures are 3.6 dB and 3.9 dB, respectively. The gain and noise performances showed little degradation compared to those of the unflipped MMICs when appropriate bonding conditions are given. We confirmed that the flip-chip structure has high reliability under a thermal cycle test. From these results, flip-chip technology is promising for millimeter-wave applications.

  • A Compact Plastic Package with High RF Isolation by Subsidiary Inner Ground Leads

    Hidetoshi ISHIDA  Kazuo MIYATSUJI  Tsuyoshi TANAKA  Daisuke UEDA  Chihiro HAMAGUCHI  

     
    PAPER-RF Assembly Technology

      Page(s):
    2044-2049

    A novel method to obtain a compact plastic package with higher isolation by providing subsidiary inner ground leads between outer leads is proposed and demonstrated. The effect of the subsidiary ground leads is investigated by using a 3-dimensional electromagnetic field simulation and measuring the fabricated packages. Newly designed package with subsidiary ground leads achieves higher isolation by more than 10 dB at 3 GHz as compared to a conventional package. This package is applied to GaAs SPDT switch IC's. Isolation of the switch IC's is improved by 5 dB at 3 GHz by the subsidiary inner ground leads. The isolation characteristics are discussed based on the equivalent circuit extracted from the simulation results.

  • Very-Thin, Light-Weight Opto and Microwave Receiver Module for Satellite Communications

    Kazuhiko NAKAHARA  Shinichi KANEKO  Yasushi ITOH  

     
    PAPER-RF Assembly Technology

      Page(s):
    2050-2055

    Miniaturized opto and microwave receiver module using DCCPWs (Double Conductor Coplanar Waveguides) have been developed for active phased array antennas. The module comprised by a microstrip-to-slot transition, two chips of low-noise MMIC amplifiers, and a laser diode module is fabricated on an ultra-thin package with 10301.5 mm3 in size and 2 g in weight to achieve an ultra-thin structure of active phased array antenna panels. The ultra-thin structure is attributed to the design of low-noise MMIC amplifiers using DCCPWs and laser diode modules using silicon V-groove technology and fiber alignment method.

  • Regular Section
  • Current-Sensed SRAM Techniques for Megabit-Class Integration--Progress in Operating Frequency by Using Hidden Writing-Recovery Architecture--

    Nobutaro SHIBATA  

     
    PAPER-Integrated Electronics

      Page(s):
    2056-2064

    A new data-I/O scheme with a hidden writing-recovery architecture has been developed for the megabit-class high operating frequency SRAMs. Read-out nodes in the memory cell are separated from bitline-connected writing nodes so as not to delay sensing initiation due to uncompleted bitline recovery. The data stored in a memory cell are read-out by sensing the differential current signal on a double-rail virtual-GND line along bitlines. Each pair of virtual-GND lines is imaginarily short-circuited by a sense amplifier, so that the read-out circuitry would have large immunity against virtual-GND-line noises. The critical noise level associated with data destruction is analyzed at various supply voltages. The virtual-GND-line-sensed memory cell with the squashed topology, the swing-suppression-type low-power writing circuitry, and the current-sense amplifier with extra negative feedback loops, --which are used in the data-I/O scheme are also mentioned. Assuming a sub array in megabit-class SRAMs, 4 K-words 6 -bits test chip was fabricated with a 0.5-µm CMOS process. The SRAM achieved 180-MHz operation at a typical 3.3-V, 25 condition. The power dissipation at the practical operating frequency of 133-MHz was 50-mW.

  • Expanding WDM Signal Transport Distance between Photonic Transport System Nodes by Using SOAs

    Norio SAKAIDA  Hiroshi YASAKA  

     
    PAPER-Opto-Electronics

      Page(s):
    2065-2069

    This paper describes the effectiveness of compact semiconductor optical amplifiers (SOAs) in the photonic transport system (PTS). Such amplifiers are small enough to permit high-density packaging. SOAs, having unsaturated signal gain of 10 dB and saturation output power of 10 dBm, can improve the Q-value by 3 over the SOA input power range of 10 dB. Within this range, the signal transport distance can be expanded from 360 km to 600 km by placing SOAs on individual optical channels in a PTS even though the amplified spontaneous emission (ASE) generated by individual SOAs is combined with the optical signals and delivered to the same output fiber. This result indicates that it is useful to employ compact SOAs in the PTS for enlarging the distances between nodes.

  • A Class of Two-Variable Analog Filters with Maximally Flat Response and Its Applications to Microwave Band-Pass Filter Design

    Hideaki FUJIMOTO  Yasumasa NOGUCHI  

     
    PAPER-Microwave and Millimeter Wave Technology

      Page(s):
    2070-2080

    This paper presents two types of two-variable analog filters with maximally flat magnitude-squared attenuation response in the two-dimensional pass region. These are applied in order to obtain five types for the distribution of two-dimensional pass regions with respect to the design of microwave band pass filters consisting of a cascade of commensurate-line filter and lumped LC filter or a cascade of two commensurate-line filters in different propagation times.

  • A Model Order Estimation in the Matrix Pencil Method for the Transient Response of a Microwave Circuit Discontinuity

    Manabu KITAMURA  Jun-ichi TAKADA  Kiyomichi ARAKI  

     
    PAPER-Microwave and Millimeter Wave Technology

      Page(s):
    2081-2086

    The Matrix-Pencil (MP) method is applied to the estimation of the undesired radiation from the microstrip line discontinuities. The Q factors are obtained from the complex resonant frequencies estimated from FDTD transient field by using MP. The number of the damped oscillations is estimated by using MDL which is widely used as an information theoretic criterion for the model order estimation.

  • Miniaturized Millimeter-Wave HMIC Amplifiers Using Capacitively-Coupled Matching Circuits and FETs with Resistive Source-Stubs

    Hiromitsu UCHIDA  Hideshi HANJYO  Yasushi ITOH  

     
    PAPER-Microwave and Millimeter Wave Technology

      Page(s):
    2087-2093

    Miniaturized millimeter-wave HMIC amplifiers have been developed by using capacitively-coupled matching circuits (CCMC) and FETs with resistive source-stubs. CCMC includes FET's parasitic reactances, and is able to reduce the size of a matching circuit in a HMIC amplifier to about 1/3 of a conventional matching circuit using an open-circuited stub for matching and a quarter-wavelength coupled-line for d. c. blocking. The resistive source-stubs, which consist of two open-circuited stubs and a resistor, can improve the gain and stability of FETs at millimeter-wave frequencies. In this paper, design procedures of CCMC and the resistive source-stubs are described, and their usefulness has been confirmed experimentally through measurements of prototype V-band high-power HMIC amplifiers.

  • A Compact Smith-Purcell Free-Electron Laser with a Bragg Cavity

    Tipyada THUMVONGSKUL  Akimasa HIRATA  Toshiyuki SHIOZAWA  

     
    PAPER-Electromagnetic Theory

      Page(s):
    2094-2100

    The growth and saturation characteristics of an electromagnetic (EM) wave in a Smith-Purcell free-electron laser (FEL) with a Bragg cavity are investigated in detail with the aid of numerical simulation based upon the fluid model of the electron beam. To analyze the problem, a two-dimensional (2-D) model of the Smith-Purcell FEL is considered. The model consists of a planar relativistic electron beam and a parallel plate metallic waveguide, which has a uniform grating carved on one plate. For confinement and extraction of EM waves, a Bragg cavity is formed by a couple of reflector gratings with proper spatial period and length, which are connected at both ends of the waveguide. The results of numerical simulation show that a compact Smith-Purcell FEL can be realized by using a Bragg cavity composed of metallic gratings.

  • Fully On-Chip Current Controlled Open-Drain Output Driver for High-Bandwidth DRAMs

    Young-Hee KIM  Jong-Ki NAM  Young-Soo SOHN  Hong-June PARK  Ki-Bong KU  Jae-Kyung WEE  Joo-Sun CHOI  Choon-Sung PARK  

     
    LETTER-Integrated Electronics

      Page(s):
    2101-2104

    A fully on-chip current controlled open-drain output driver using a bandgap reference current generator was designed for high bandwidth DRAMs. It reduces the overhead of receiving a digital code from an external source for the compensation of the temperature and supply voltage variations. The correct value of the current control register is updated at the end of every auto refresh cycle. The operation at the data rate up to 0.8 Gb/s was verified by SPICE simulation using a 0.22 µm triple-well CMOS technology.

  • Reflection of Light Caused by Sharp Bends in Optical Fiber

    Kyozo TSUJIKAWA  Koji ARAKAWA  Koji YOSHIDA  

     
    LETTER-Opto-Electronics

      Page(s):
    2105-2107

    We investigated the reflection of light caused by sharp bends in optical fiber experimentally. The position distribution of reflection power was measured using an OTDR and an OLCR. We found that the reflection power increased linearly as the logarithm of the bending loss increased, which agrees with expectation from a simple theoretical model. We believe that the light we observed was part of the leaked light, which was reflected between the primary and secondary coatings.

  • Efficiency Enhancement in a Rectangular Cherenkov Laser by a Proper Variation of Dielectric Permittivity in the Transverse Direction

    Sirou HIROSAKA  Akimasa HIRATA  Toshiyuki SHIOZAWA  

     
    LETTER-Electromagnetic Theory

      Page(s):
    2108-2109

    In order to enhance the energy transfer efficiency in a rectangular Cherenkov laser, we propose to vary properly the permittivity of a loaded dielectric in the transverse direction. With the aid of particle simulation, we investigate the amplification characteristics of the rectangular Cherenkov laser with a dielectric permittivity varied in the transverse direction, demonstrating the effectiveness of our proposal for efficiency enhancement.