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Ken HIRAGA Tomohiro SEKI Kentaro NISHIMORI Kenjiro NISHIKAWA Ichihiko TOYODA Kazuhiro UEHARA
Short-range multiple-input and multiple-output (SR-MIMO) has attracted much attention, because the technique makes it possible to raise channel capacity to several hundred Gbit/s by utilizing the millimeter-wave band (e.g., 60 GHz band). Although the opposed transceiving antennas are assumed to be accurately positioned in previous studies regarding SR-MIMO, a very important issue is to evaluate the performance degradation due to displacement between MIMO transceivers. In SR-MIMO over the millimeter-wave band, any displacement is perceived as significant because the wavelength is small. This paper evaluates the influence on SR-MIMO transmission performance over millimeter-wave caused by displacement between the transmitting and receiving antennas. The channel capacity is found to degrade by 5% when the horizontal displacement is 1 mm and by 2.7% when the rotational displacement is 10 degrees. In addition, comparing performances obtained with a number of antenna array arrangements clarifies that a square pattern arrangement is suitable for short-range wireless transmission.
Maodudul HASAN Eisuke NISHIYAMA Ichihiko TOYODA
Herein, a novel self-oscillating active integrated array antenna (AIAA) is proposed for beam switching X-band applications. The proposed AIAA comprises four linearly polarized microstrip antenna elements, a Gunn oscillator, two planar magic-Ts, and two single-pole single-throw (SPST) switches. The in/anti-phase signal combination approach employing planar magic-Ts is adopted to attain bidirectional radiation patterns in the φ =90° plane with a simple structure. The proposed antenna can switch its beam using the SPST switches. The antenna is analyzed through simulations, and a prototype of the antenna is fabricated and tested to validate the concept. The proposed concept is found to be feasible; the prototype has an effective isotropic radiated power of +15.98dBm, radiated power level of +4.28dBm, and cross-polarization suppression of better than 15dB. The measured radiation patterns are in good agreement with the simulation results.
Ichihiko TOYODA Makoto HIRANO Masami TOKUMITSU Yuhki IMAI Kenjiro NISHIKAWA Kenji KAMOGAWA Suehiro SUGITANI
A procedure for quickly developing highly integrated multifunctional MMICs by using the three-dimensional masterslice MMIC technology has been developed. The structures and advanced features of this technology, such as miniature transmission lines, a broadside coupler, and miniature function block circuits, enable multifunctional MMICs to be quickly and easily developed. These unique features and basic concept of the masterslice technology are discussed and reviewed to examine the advantages of this technology. As an example of quick MMIC development, an amplifier, a mixer, and a down-converter are fabricated on a newly designed master array.
Kenji KAMOGAWA Ichihiko TOYODA Tsuneo TOKUMITSU Kenjiro NISHIKAWA
Subharmonically Injection-locked oscillators (ILO's) with very wide injection-locking ability are presented. Two types of ILO MMIC's with this ability are proposed. The oscillation frequency tuning function of the ILO MMIC is very useful for expansion of the injection locking range at higher subharmonics. One consists of a shunt varactor diode inserted into the oscillation loop, and the other incorporates a vector-combining configuration with in-phase divider and 90 degree hybrid. Using three-dimensional MMIC's technology which can offer miniature and high-density passive circuits, the vector-combining type ILO is formed in a very compact area of 1. 7 mm2. Fabricated 20 GHz-band ILO achieves a wide tuning ranges of 870 MHz, resulting in a very wide locking range for higher subharmonics. The wide frequency tuning ability also reduces phase noise, shortens a locking time and compensates the center frequency deviation against temperature, as well as increasing locking range. The measured results show that the ILO configuration is extremely suitable for realizing simple, fully monolithic and low phase noise millimeter-wave frequency synthesizers.
Belinda PIERNAS Kenjiro NISHIKAWA Kenji KAMOGAWA Ichihiko TOYODA
This paper reviews the advantages of the silicon three-dimensional MMIC technology such as low loss transmission lines, high integration level, and high Q-factor on-chip inductors. Coupled to the masterslice concept, this technology also offers simple design procedure, short turn-around-time, low cost, and potential integration with LSI circuits. A K-band amplifier and an up-converter demonstrate the high frequency operation and low-power consumption benefits of the Si 3-D MMIC technology. A C-band Si-bipolar single-chip transceiver is proposed to illustrate the high integration level offered by the masterslice concept. Finally, the recent advances we achieved toward high Q-factor on-chip inductors provide the design of the S-band low noise amplifier presented in this paper.
Kenji KAMOGAWA Ichihiko TOYODA Tsuneo TOKUMITSU
A subharmonic injection-locked oscillator (ILO) MMIC chain is proposed for the local oscillators and synthesizers used at millimeter-wave frequencies. A fabricated, primary 11-GHz-band injection-locked oscillator MMIC for the first stage ILO in the ILO-chain MMIC, achieves a wide subharmonic-injection-locking range at the subharmonic factors, 1/n (n=1, 2, 3, ), of 1/1, 1/2 and 1/3. The ILO MMIC abilities for synthesizer applications were confirmed with an injection-locking time of only 100-200 nsec, which is less than 1/100 that of PLL oscillators, and also with free-running oscillation performance and a wide injection locking range within a temperature range of -30 and 80.
Makoto HIRANO Yuhki IMAI Ichihiko TOYODA Kenjiro NISHIKAWA Masami TOKUMITSU Kazuyoshi ASAI
Novel three-dimensional structures for passive elements--inductors, capacitors, transmission lines, and airbridges--have been developed to reduce the area they consume in GaAs MMICs. These structures can be formed with a simple technology by electroplating along the sidewalls of a photoresist. Adopting the new structures, most passive elements in MMICs have been shrunk to less than 1/4 the size of conventional ones.
Ichihiko TOYODA Makoto HIRANO Tsuneo TOKUMITSU
A new three-dimensional MMIC structure and an ultra-wideband miniature MMIC balun are proposed. The MMIC is a combined structure of multilayer MMICs and U-shaped micro-wires. This technology effectively reduces chip size and enhances MMIC performance. The proposed balun is constructed with three narrow conductors located side by side. The U-shaped micro-wire technology is employed to reduce the insertion loss and chip size. 1.51 dB insertion loss over 10 to 30 GHz, and 2 dB and 5 degrees of amplitude and phase balances over 5 to 35 GHz have been obtained. The intrinsic area of the balun is only 450800 µm, about 1/5 to 1/3 the area of recently reported miniaturized MMIC baluns.
Yasuo SUZUKI Ichihiko TOYODA Masahiro UMEHIRA
The interference imposed on conventional narrow-band systems by impulse radio UWB (IR-UWB) signals is examined by simulations. The Dirac delta function is employed to model the IR-UWB signal to reduce simulation costs. The simulation results show that the statistical characteristics of this interference deviate from Gaussian noise when the frequency band of the narrow-band system includes a half multiple of the data symbol rate of the IR-UWB system. In the case of pulse-position-modulation UWB signals and biorthogonal-coded bipolar-modulation UWB signals, the performance degradation of the narrow-band system depends on the number of pulse positions and the number of orthogonal codes, respectively.
Hiroyuki SHIBA Takashi SHONO Yushi SHIRATO Ichihiko TOYODA Kazuhiro UEHARA Masahiro UMEHIRA
A software defined radio (SDR) prototype based on a multiprocessor architecture (MPA) is developed. Software for Japanese personal handy phone system (PHS) of a 2G mobile system, and IEEE 802.11 wireless LAN, which has much wider bandwidth than the 2G systems, is successfully implemented. Newly developed flexible-rate pre-/ post-processor (FR-PPP) achieves the flexibility and wideband performance that the platform needs. This paper shows the design of the SDR prototype and evaluates its performance by experiments that include PHS processor load and wireless LAN throughput characteristics and processor load.