In this paper, we present a 10 Gbase Ethernet Transceiver that is suitable for 10 Gb/s Ethernet applications. The 10 Gbase Ethernet Transceiver LSI, which contains the high-speed interface and the fully integrated IEEE 802.3ae compliant logics, is fabricated in a 0.18 µm SOI/CMOS process and dissipates 2.9 W at 1.8 V supply. By incorporating the monolithic approach and the use of the advance CMOS process, this 10 GbE transceiver realizes a low power, low cost and compact solution for the exponentially increasing need of broadband network applications.

An emitter coupled logic (ECL) compatible low-power GaAs 8:1 multiplexer (MUX) and 1:8 demultiplexer (DEMUX) for 10-Gb/s optical communication systems has been developed. In order to decrease the power consumption and to maximize the timing margin, we estimated the power consumption for direct-coupled FET logic (DCFL) and source-coupled FET logic (SCFL) circuits in terms of the D-type flip-flop (D-FF) operating speed and the duty-ratio variation. Based on the result, we used SCFL circuits in the clock-generating circuit and the circuits operating at 10 Gb/s, and we used DCFL circuits in the circuits operating below 5 Gb/s. These ICs, which are mounted on ceramic packages, operate at up to 10 Gb/s with power consumption of 1.2 W for the 8:1 MUX and 1.0 W for the 1:8 DEMUX. This is the lowest power consumption yet reported for 10-Gb/s 8:1 MUX and 1:8 DEMUX.

GaAs 10 Gb/s 64:1 Multiplexer/Demultiplexer chip sets have been successfully developed. The 64-bit 156 Mb/s parallel data output or input of these chip sets can be directly connected to CMOS LSIs. These chip sets consist of a 10Gb/s 4: 1 MUX IC, a 10 Gb/s 1: 4 DEMUX IC, four 2.5 Gb/s 16: 1 MUX LSIs and four 2.5 Gb/s 1: 16 DEMUX LSIs. This multi-chip construction is adopted for low power dissipation and high yield. The basic circuit employed in the 10 Gb/s4: 1 MUX/DEMUX ICs is an SCFL circuit using 0.4 µm-gate FETs with a power supply of -5.2 V, and that in 2.5 Gb/s 16: 1 MUX/DEMUX LSIs is a DCFL circuit using 0.6 µm-gate FETs with a power supply of -2.0 V. These chip sets have functions for synchronization among these ICs and to enable bit shift to make the system design easier. In the 10 Gb/s 4: 1 MUX IC, a timing adjuster is adopted. This timing adjuster can delay the timing of the most critical path by 50 ps. Even if the delay times are out of order due to fluctuations in process, temperature, power supply voltage and other factors, this timing can be revised and the 4: 1 MUX IC can operate at 10 Gb/s. Furthermore, a 48-pin quad flat package for 10 Gb/s 4: 1 MUX/DEMUX ICs has been newly developed. The measured insertion loss is 1.7 dB (at 10 GHz), and the isolation is less than -20 dB (at 10 GHz). These values are sufficient in practical usage. Measurements of these chip sets show desirable performance at the target 10 Gb/s. The power dissipations of the 64: 1 MUX/DEMUX chip sets are 10.3 W and 8.2 W, respectively. These chip sets is expected to contribute to high speed telecommunication systems.

A new device consisting of an optical pulse generation section and pulse coding section monolithically integrated on a single-chip has been developed. The pulse generation section consists of a multiple quantum well (MQW) electroabsorption modulator integrated with an MQW DFB laser. The modulator operates at large-signal modulation and low voltage (from 2 to 3-V DC bias with a 3.2-V peak-to-peak RF signal). The second modulator is operated independently as a pulse encoder. An approximately transform-limited optical pulse train, whose full width at half maximum (FWHM) in the time domain is less than 17-ps and spectral FWHM is 28-GHz, is obtained with a repetition frequency of 10-GHz. Compressive strain is introduced in both InGaAsP quantum wells in order to obtain efficient device characteristics. These include a low threshold current (18-mA) for the laser, and low driving voltage (30-dB for 3-V swing) and high-speed operation (over 12-GHz for a 3-dB bandwidth) for the modulators. Demonstrations show that this new device generates short optical pulses encoded by a pseudo-random signal at a rate of 10 Gbit/s. This is the first time 10 Gbit/s modulation has been achieved with a multi-section electroabsorption modulator/DFB laser integrated light source. This monolithic device is expected to be applied to optical soliton transmitters.