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IEICE TRANSACTIONS on Electronics

A Fully On-Chip, 6.66-kHz, 320-nA, 56ppm/°C, CMOS Relaxation Oscillator with PVT Variation Compensation Circuit

Keishi TSUBAKI, Tetsuya HIROSE, Yuji OSAKI, Seiichiro SHIGA, Nobutaka KUROKI, Masahiro NUMA

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Summary :

A fully on-chip CMOS relaxation oscillator (ROSC) with a PVT variation compensation circuit is proposed in this paper. The circuit is based on a conventional ROSC and has a distinctive feature in the compensation circuit that compensates for comparator's non-idealities caused by not only offset voltage, but also delay time. Measurement results demonstrated that the circuit can generate a stable clock frequency of 6.66kHz. The current dissipation was 320nA at 1.0-V power supply. The measured line regulation and temperature coefficient were 0.98%/V and 56ppm/°C, respectively.

Publication
IEICE TRANSACTIONS on Electronics Vol.E97-C No.6 pp.512-518
Publication Date
2014/06/01
Publicized
Online ISSN
1745-1353
DOI
10.1587/transele.E97.C.512
Type of Manuscript
Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category

Authors

Keishi TSUBAKI
  Kobe University
Tetsuya HIROSE
  Kobe University
Yuji OSAKI
  Kobe University
Seiichiro SHIGA
  Kobe University
Nobutaka KUROKI
  Kobe University
Masahiro NUMA
  Kobe University

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