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[Author] Daisuke KANEMOTO(7hit)

1-7hit
  • Image Quality Improvement for Capsule Endoscopy Based on Compressed Sensing with K-SVD Dictionary Learning

    Yuuki HARADA  Daisuke KANEMOTO  Takahiro INOUE  Osamu MAIDA  Tetsuya HIROSE  

     
    LETTER-Image

      Pubricized:
    2021/10/01
      Vol:
    E105-A No:4
      Page(s):
    743-747

    Reducing the power consumption of capsule endoscopy is essential for its further development. We introduce K-SVD dictionary learning to design a dictionary for sparse coding, and improve reconstruction accuracy of capsule endoscopic images captured using compressed sensing. At a compression ratio of 20%, the proposed method improves image quality by approximately 4.4 dB for the peak signal-to-noise ratio.

  • A High Dynamic Range and Low Power Consumption Audio Delta-Sigma Modulator with Opamp Sharing Technique among Three Integrators

    Daisuke KANEMOTO  Toru IDO  Kenji TANIGUCHI  

     
    PAPER-Electronic Circuits

      Vol:
    E95-C No:8
      Page(s):
    1427-1433

    A low power and high performance with third order delta-sigma modulator for audio applications, fabricated in a 0.18 µm CMOS process, is presented. The modulator utilizes a third order noise shaping with only one opamp by using an opamp sharing technique. The opamp sharing among three integrator stages is achieved through the optimal operation timing, which makes use of the load capacitance differences between the three integrator stages. The designed modulator achieves 101.1 dB signal-to-noise ratio (A-weighted) and 101.5 dB dynamic range (A-weighted) with 7.5 mW power consumption from a 3.3 V supply. The die area is 1.27 mm2. The fabricated delta-sigma modulator achieves the highest figure-of-merit among published high performance low power audio delta-sigma modulators.

  • Compressed Sensing EEG Measurement Technique with Normally Distributed Sampling Series

    Yuki OKABE  Daisuke KANEMOTO  Osamu MAIDA  Tetsuya HIROSE  

     
    LETTER-Measurement Technology

      Pubricized:
    2022/04/22
      Vol:
    E105-A No:10
      Page(s):
    1429-1433

    We propose a sampling method that incorporates a normally distributed sampling series for EEG measurements using compressed sensing. We confirmed that the ADC sampling count and amount of wirelessly transmitted data can be reduced by 11% while maintaining a reconstruction accuracy similar to that of the conventional method.

  • Compressed Sensing Framework Applying Independent Component Analysis after Undersampling for Reconstructing Electroencephalogram Signals Open Access

    Daisuke KANEMOTO  Shun KATSUMATA  Masao AIHARA  Makoto OHKI  

     
    PAPER-Biometrics

      Pubricized:
    2020/06/22
      Vol:
    E103-A No:12
      Page(s):
    1647-1654

    This paper proposes a novel compressed sensing (CS) framework for reconstructing electroencephalogram (EEG) signals. A feature of this framework is the application of independent component analysis (ICA) to remove the interference from artifacts after undersampling in a data processing unit. Therefore, we can remove the ICA processing block from the sensing unit. In this framework, we used a random undersampling measurement matrix to suppress the Gaussian. The developed framework, in which the discrete cosine transform basis and orthogonal matching pursuit were used, was evaluated using raw EEG signals with a pseudo-model of an eye-blink artifact. The normalized mean square error (NMSE) and correlation coefficient (CC), obtained as the average of 2,000 results, were compared to quantitatively demonstrate the effectiveness of the proposed framework. The evaluation results of the NMSE and CC showed that the proposed framework could remove the interference from the artifacts under a high compression ratio.

  • Applying K-SVD Dictionary Learning for EEG Compressed Sensing Framework with Outlier Detection and Independent Component Analysis Open Access

    Kotaro NAGAI  Daisuke KANEMOTO  Makoto OHKI  

     
    LETTER-Biometrics

      Pubricized:
    2021/03/01
      Vol:
    E104-A No:9
      Page(s):
    1375-1378

    This letter reports on the effectiveness of applying the K-singular value decomposition (SVD) dictionary learning to the electroencephalogram (EEG) compressed sensing framework with outlier detection and independent component analysis. Using the K-SVD dictionary matrix with our design parameter optimization, for example, at compression ratio of four, we improved the normalized mean square error value by 31.4% compared with that of the discrete cosine transform dictionary for CHB-MIT Scalp EEG Database.

  • Programmable Differential Bandgap Reference Circuit for Ultra-Low-Power CMOS LSIs Open Access

    Yoshinori ITOTAGAWA  Koma ATSUMI  Hikaru SEBE  Daisuke KANEMOTO  Tetsuya HIROSE  

     
    PAPER

      Pubricized:
    2024/04/09
      Vol:
    E107-C No:10
      Page(s):
    392-399

    This paper describes a programmable differential bandgap reference (PD-BGR) for ultra-low-power IoT (Internet-of-Things) edge node devices. The PD-BGR consists of a current generator (CG) and differential voltage generator (DVG). The CG is based on a bandgap reference (BGR) and generates an operating current and a voltage, while the DVG generates another voltage from the current. A differential voltage reference can be obtained by taking the voltage difference from the voltages. The PD-BGR can produce a programmable differential output voltage by changing the multipliers of MOSFETs in a differential pair and resistance with digital codes. Simulation results showed that the proposed PD-BGR can generate 25- to 200-mV reference voltages with a 25-mV step within a ±0.7% temperature inaccuracy in a temperature range from -20 to 100°C. A Monte Carlo simulation showed that the coefficient of the variation in the reference was within 1.1%. Measurement results demonstrated that our prototype chips can generate stable programmable differential output voltages, almost the same results as those of the simulation. The average power consumption was only 88.4 nW, with a voltage error of -4/+3 mV with 5 samples.

  • Sub-60-mV Charge Pump and its Driver Circuit for Extremely Low-Voltage Thermoelectric Energy Harvesting Open Access

    Hikaru SEBE  Daisuke KANEMOTO  Tetsuya HIROSE  

     
    PAPER

      Pubricized:
    2024/04/09
      Vol:
    E107-C No:10
      Page(s):
    400-407

    Extremely low-voltage charge pump (ELV-CP) and its dedicated multi-stage driver (MS-DRV) for sub-60-mV thermoelectric energy harvesting are proposed. The proposed MS-DRV utilizes the output voltages of each ELV-CP to efficiently boost the control clock signals. The boosted clock signals are used as switching signals for each ELV-CP and MS-DRV to turn switch transistors on and off. Moreover, reset transistors are added to the MS-DRV to ensure an adequate non-overlapping period between switching signals. Measurement results demonstrated that the proposed MS-DRV can generate boosted clock signals of 350 mV from input voltage of 60 mV. The ELV-CP can boost the input voltage of 100 mV with 10.7% peak efficiency. The proposed ELV-CP and MS-DRV can boost the low input voltage of 56 mV.