We propose and fabricate n+-p+ double-gate SOI MOSFETs for which threshold voltage is controlled by interaction between the two gates. Devices have excellent short channel immunity, dispite a low channel doping concentration of 1015 cm-3, and enable us to design a threshold voltage below 0.3 V while maintaining an almost ideal subthreshold swing. We demonstrated 27 ps CMOS inverter delay with a gate length of 0.19 µm, which is, to our knowledge, the lowest delay for this gate length despite rather a thick 9 nm gate oxide. This high performance is a result of the low threshold voltage and negligible drain capacitance. We also showed theoretically that we can design a 0.1 µm gate length device with an ideal subthreshold swing, and that we can expect less than 10 ps inverter delay at a supply voltage of 1 V.

This paper describes the technological issues in achieving a low-cost hybrid WDM module for access network systems. The problems which should be resolved in developing a low-cost module are clarified from the viewpoint of the module assembly in mass production. A design concept for a low-cost module suitable for mass production is indicated, which simplifies the alignment between a laser diode and a waveguide, and reduces the number of the components such as lenses and mirrors. The low-cost module is achieved by employing a flip-chip bonding method with passive alignment using a spot-size converter integrated laser diode (SS-LD) and p-i-n waveguide photodiodes (WGPDs) on a planar lightwave circuit (PLC) platform. We confirm that the SS-LD and the WGPD provide high coupling efficiency with a large tolerance for passive alignment. To achieve a high-sensitivity receiver, the module is designed to employ an asymmetric PLC Y-splitter that prefers a PD responsivity to an LD output power because of the high-coupling efficiency of the LD, and to employ a bare preamplifier mounting to reduce the parasitic capacitance into a preamplifier. We also demonstrate the dynamic performance for a 50-Mb/s burst signal, such as a high sensitivity, an instantaneous AGC response, and a small APC deviation of the transceiver.

Handwritten character recognition has been increasing its importance and has been expanding its application areas such as office automation, postal service automation, automatic data entry to computers, etc. It is challenging to develop a handwritten character recognition system with high processing speed, high performance, and high portability, because there is a trade-off among them. In current technology, it is difficult to attain high performance and high processing speed at the same time with single algorithms, and therefore, we need to find an efficient way of combination of multiple algorithms. We present an engineering solution to this problem. The system is based on multi-stage strategy as a whole: The first stage is a simple, fast, and reliable recognition algorithm with low substitution-error rate, and data of high quality are recognized in this stage, whereas sloppily written or degraded data are rejected and sent out to the second stage. The second stage is composed of a sophisticated structural pattern classifier and a pattern matching classifier, and these two complementary algorithms run in parallel (multiple expert approach). We demonstrate the performance of the completed system by experiments using real data.

Multidimensional signal processing has recently been attracting attention in various fields, and has been studied theoretically. TV receives using 3-D (3-Dimensional: horizontal, vertical and temporal) processing, such as IDTV (ImproveD TV), are already available. In addition, television systems with high quality video and mostly with wide-aspect ratio are being studied worldwide. All the proposed systems adopt 3-D signal processing. 3-D processing can fully utilize the transmitted signal, and can take full advantage of the available bandwidth. This results in improved picture quality. This paper reviews the 3-D signal processing used in IDTV and EDTV (EnhanceD TV) in Japan. Video signals are analyzed in the 3-D frequency domain, and 3-D filter design is also studied.

High frequency and low power 128/129 dual modulus prescaler ICs are developed for mobile communication applications, using 0.5 µm GaAs MESFET technology. Provided with an on-chip voltage regulator, a prescaler IC with an input amplifier operates in a wide frequency range from 200 MHz to 1,500 MHz at input power from -15 dBm to +17 dBm at the temperature of -30 to +120 with supply voltage of 2.7 V, 3.0 V and 5.0 V. At the same time, it demonstrated its low power characteristics consuming 3.68 mA with 3.0 V at +30 in operation, 0.16 mA while powered-off. Another prescaler IC without an input amplifier operates up to 1,650 MHz with Vdd=2.7 V, 3.0 V and 5.0 V at +30, dissipating 2.74 mA/3.0 V.

In Mobile Ad-hoc Networks (MANET), transportation capability of wireless links' varies according to the size of the packets they transport. This instability, which is more acute in long links, has received little attention in the stabilizing schemes proposed so far for MANET. A lot of research has been carried out to utilize more reliable links in making end-to-end routes to avoid frequent route failures and realize higher packet delivery ratio. However, these approaches mainly consider the availability of a link over time and depend on link history which is difficult to acquire in highly dynamic systems. In this paper, we present an easy-to-implement but efficient method to find suitable end-to-end routes that are capable of transporting different sizes of the application data packets. Our scheme is stateless and does not rely on the underlying data link and physical layers. An extensive simulation shows the validity of our concept and highlights the improvement achieved by our proposal.

A (k,δ,ε)-locally decodable code C:Fqn FqN is an error-correcting code that encodes =(x1,x2,...,xn) ∈ Fqn to C() ∈ FqN and has the following property: For any ∈ FqN such that d(,C()) ≤ δ N and each 1 ≤ i ≤ n, the symbol xi of can be recovered with probability at least 1-ε by a randomized decoding algorithm looking at only k coordinates of . The efficiency of a (k,δ,ε)-locally decodable code C:Fqn FqN is measured by the code length N and the number k of queries. For a k-query locally decodable code C:Fqn FqN, the code length N was conjectured to be exponential of n, i.e., N=exp(nΩ(1)), however, this was disproved. Yekhanin [In Proc. of STOC, 2007] showed that there exists a 3-query locally decodable code C:F2n F2N such that N=exp(n1/log log n) assuming that infinitely many Mersenne primes exist. For a 3-query locally decodable code C:Fqn FqN, Efremenko [ECCC Report No.69, 2008] further reduced the code length to N=exp(nO((log log n/ log n)1/2)), and in general showed that for any integer r>1, there exists a 2r-query locally decodable code C:Fqn FqN such that N=exp(nO((log log n/ log n)1-1/r)). In this paper, we will present improved constructions for query-efficient locally decodable codes by introducing a technique of "composition of locally decodable codes," and show that for any integer r>5, there exists a 9 2r-4-query locally decodable code C:Fqn FqN such that N=exp(nO((log log n/ log n)1-1/r)).

We have analyzed the dominant noise sources in the driving circuit of an uncooled infrared radiation focal plane array fabricated on a silicon-on-insulator (SOI) substrate by 0.35 µm CMOS technology and bulk- micromachining. We found no noise property of SOI-MOSFET inferior compared to those of NMOSs formed on SOI and bulk substrate, respectively. In addition, we reduced the total noise of the sensor chip by designing the current source NMOS sufficiently large, and optimized the operating current of pixel pn-junctions.

A new optical access system based on the synchronous transfer mode - passive double star system has been developed to provide high-speed LAN-like access. It uses a shared-band method that enables multiple users to efficiently share a single bandwidth of up to 10 Mb/s and a grouping function that divides the access network into several logical networks, each of which can provide a virtual LAN to users. This paper describes an information model and a framework for configuration management and fault management and discusses the requirements for element management, which involves data-link establishment, logical group management, and testing. Element management mainly requires appropriate remote handling on data cards installed in each optical network unit on user premises. A method is proposed that satisfies these requirements. With this method, the element operations system can provide the required operational functionality.

In future, mobile terminals may be linked in various types of local network where the whole network is moving. Mobile networks will need to provide global connectivity to such moving networks and manage their mobility. A moving network consists of mobile terminals and a mobile router, which acts as the gateway to the mobile network. To manage the mobility of the moving network, it is important to minimize the packet overhead, to optimize routing, and to reduce the volume of handoff signals over the mobile network and air interface. This paper proposes a new routing mechanism using hierarchical mobile network prefix assignment, home agent concatenation, hierarchical address management, and hierarchical re-routing. In hierarchical mobile network prefix assignment, a mobile router is assigned a mobile network prefix, which is used as a prefix when allocating the location addresses of mobile terminals in the moving network, so allowing them to be managed in a hierarchical manner. Home agent concatenation limits the number of home agents which need to be updated during handoff by enabling one home agent hold information relating to others, while hierarchical address management minimizes the volume of handoff signals by managing the location addresses of all mobile terminals in a hierarchical manner. Hierarchical re-routing introduces a local anchor router in order to localize handoff and to optimize routing. Simulation results show that our proposed routing method is better than the conventional solutions in terms of efficiency of data transmission including data transmission delay, and handoff performance.

Recently, cloud systems have started to be utilized for services which analyze user's data in the field of computer vision. In these services, keypoints are extracted from images or videos, and the data is identified by machine learning with a large database in the cloud. To reduce the number of keypoints which are sent to the cloud, Keypoints of Interest (KOI) extraction has been proposed. However, since its computational complexity is large, hardware implementation is required for real-time processing. Moreover, the hardware resource must be low because it is embedded in devices of users. This paper proposes a hardware-friendly KOI algorithm with low amount of computations and its real-time hardware implementation based on dual threshold keypoint detection by gradient histogram and parallelization of connectivity of adjacent keypoint-utilizing register counters. The algorithm utilizes dual-histogram based detection and keypoint-matching based calculation of motion information and dense-clustering based keypoint smoothing. The hardware architecture is composed of a detection module utilizing descriptor, and grid-region-parallelization based density clustering. Finally, the evaluation results of hardware implementation show that the implemented hardware achieves Full-HD (1920x1080)-60 fps spatio-temporal keypoint extraction. Further, it is 47 times faster than low complexity keypoint extraction on software and 12 times faster than spatio-temporal keypoint extraction on software, and the hardware resources are almost the same as SIFT hardware implementation, maintaining accuracy.

Scale-Invariant Feature Transform (SIFT) has lately attracted attention in computer vision as a robust keypoint detection algorithm which is invariant for scale, rotation and illumination changes. However, its computational complexity is too high to apply in practical real-time applications. This paper proposes a low complexity keypoint extraction algorithm based on SIFT descriptor and utilization of the database, and its real-time hardware implementation for Full-HD resolution video. The proposed algorithm computes SIFT descriptor on the keypoint obtained by corner detection and selects a scale from the database. It is possible to parallelize the keypoint detection and descriptor computation modules in the hardware. These modules do not depend on each other in the proposed algorithm in contrast with SIFT that computes a scale. The processing time of descriptor computation in this hardware is independent of the number of keypoints because its descriptor generation is pipelining structure of pixel. Evaluation results show that the proposed algorithm on software is 12 times faster than SIFT. Moreover, the proposed hardware on FPGA is 427 times faster than SIFT and 61 times faster than the proposed algorithm on software. The proposed hardware performs keypoint extraction and matching at 60 fps for Full-HD video.

We propose a novel method of precisely measuring the polarization dependence of single pass gain (PDG) in a semiconductor optical amplifier integrated with spot-size convertors (SS-SOA). By averaging the signal gain of a SS-SOA over a wide wavelength range using the amplified spontaneous emission (ASE) of an erbium doped fiber (EDF), the PDG can be accurately estimated. This is because the influence of gain ripples on the measurement results are drastically reduced. We successfully evaluated the PDG of an angled-facet SS-SOA, even before the process of anti-reflection coating, within a small error of 0.5dB. The EDF-ASE technique is useful in sampling tests and selecting angled-facet SS-SOA chips from wafers. The polarization dependence of the coupling efficiency (PDCE) between a SS-SOA and optical fiber is also evaluated by measuring the photo-current of the active layer for TE and TM input signals. It is possible, therefore, to specify the polarization characteristics of the active region and spot-size converter region, which are indispensable parameters for the design of the SS-SOA.

Charge carrier generation, transport, and exciton diffusion in f ac tris(2-phenylpyridine)iridium(III) Ir(ppy)3 doped in 4,4'-N,N'-dicarbazole-biphenel (CBP) thin films, an emissive layer of green electrophosphorescent devices, have been studied in terms of time-of-flight (TOF) transient photocurrent, steady-state photocurrent and time-resolved photoluminescence (PL) spectroscopies. It is found that the excitation energy rapidly transfer from CBP to Ir(ppy)3, and that the charge carriers are generated on Ir(ppy)3 sites. With increasing Ir(ppy)3 concentration, the electron drift mobility is slightly decreased, while the hole transit signals become unobservable. The electron and hole transport properties of Ir(ppy)3 doped CBP thin films result from the energy levels of the lowest unoccupied molecular orbital and the highest occupied molecular orbital of Ir(ppy)3 with respect to those of CBP. From steady-state photocurrent measurement, the diffusion lengths of 3.5% and 7.0% Ir(ppy)3 doped CBP thin films are determined to be 21 nm and 50 nm, respectively.

This paper describes design techniques for suppressing crosstalk in an optical transceiver module using PLC-hybrid-integration technologies and for achieving burst-mode operation with high sensitivity and wide dynamic range using CMOS-IC technologies. An arrangement that reduces the electrical crosstalk to less than -100 dB was designed using three-dimensional electromagnetic field analysis. The configurations of a newly developed instantaneous-response CMOS LD driver circuit is also described and instantaneous-response CMOS receiver circuit techniques are reviewed. With these techniques, we have succeeded in building optical transceiver modules for ATM-PON systems using PLC-hybrid-integration and inexpensive standard CMOS-IC fabrication processes. Under full-duplex operation at 156 Mb/s, fabricated transceiver modules showed receiver sensitivity of better than -34 dBm and dynamic range of over 28 dB, which satisfy both the class-B and class-C specifications recommended by ITU-T (International Telecommunication Union-Telecommunication standardization sector) G983.1 for the optical transceiver module for an ONU (optical network unit).

It is known that perfectly secure (1-round, n-channel) message transmission (MT) schemes exist if and only if n ≥ 3t+1, where t is the number of channels that the adversary can corrupt. Then does there exist an almost secure MT scheme for n=2t+1 ? In this paper, we first sum up a number flaws of the previous almost secure MT scheme presented at Crypto 2004. We next show an equivalence between almost secure MT schemes and secret sharing schemes with cheaters. By using our equivalence, we derive a lower bound on the communication complexity of almost secure MT schemes. Finally, we present a near optimum scheme which meets our bound approximately. This is the first construction of provably secure almost secure (1-round, n-channel) MT schemes for n=2t+1.

This paper presents an overview of the SDC-I (Super Database Computer I) developed at the University of Tokyo, Japan. The purpose of the project was to build a high performance SQL server which emphasizes query processing over transaction processing. Recently relational database systems tend to be used for heavy decision support queries, which include many join, aggregation, and order-by operations. At present high-end mainframes are used for these applications requiring several hours in some cases. While the system architecture for high traffic transaction processing systems is well established, that for adhoc query processing has not yet adequately understood. SDC-I proved that a parallel machine could attain significant performance improvements over a coventional sequential machine through the exploitation of the high degree of parallelism present in relational query processing. A unique bucket spreading parallel hash join algorithm is employed in SDC, which makes the system very robust in the presense of data skew and allows SDC to attain almost linear performance scalability. SDC adopts a hybrid parallel architecture, where globally it is a shared nothing architecture, that is, modules are connected through the multistage network, but each module itself is a symmetric multiprocessor system. Although most of the hardware elements use commodity microprocessors for improved performance to cost, only the interconnection network incorporates the special function to support our parallel relational algorithm. Data movement over the memory and the network, rather than computation, is heavy for I/O intensive database processing. A dedicated software system was carefully designed for efficient data movement. The implemented prototype consists of two modules. Its hardware and software organization is described. The performance monitoring tool was developed to visualize the system activities, which showed that SDC-I works very efficiently.

We demonstrate a very simple and compact optical transceiver diode module using a passive alignment on a silicon bench with a V-groove. The excess loss caused by the passive alignment of an optical transceiver diode and a flat-end optical fiber is only 0. 6 dB. A high coupling efficiency of -4. 3 dB is obtained. This results in a high responsivity with a wavelength- and polarization-independence of 0. 5 dB over a 70 nm wavelength range and in good laser performance.

This paper focuses on a single BSA (Basic Service Area) in an infrastructure network and studies the performance of the IEEE 802.11 standard MAC protocol by means of simulation. The MAC protocol supports DCF (Distributed Coordination Function) and PCF (Point Coordination Function). The simulation model includes both data transmission with the DCF and H.263 video transmission with the PCF. In the simulation we assume that the channel transmission rate is 2 Mbps and use the system parameters specified in the standard for the DSSS (Direct Sequence Spread Spectrum) physical layer. We evaluate the performance of this protocol in terms of throughput and MPDU (MAC Protocol Data Unit) delay for various values of the CFP (Contention Free Period) repetition interval and the CFP maximum duration. Numerical results show that if the CFP repetition interval is set too long, video MPDU delay becomes very large periodically; therefore, average video MPDU delay deteriorates. We also find that as the CFP maximum duration decreases, the number of video terminals that can be accommodated in the system decreases. Furthermore, how channel transmission errors affect the performance of the protocol is examined. A two-state continuous-time Markov model is used as a burst error model. As a result, we see that for a small number of video terminals, the average video-MPDU-delay performance does not deteriorate drastically for larger values of bit error rate.

Structure tensor analysis on epipolar plane images (EPIs) is a successful approach to estimate disparity from a light field, i.e. a dense set of multi-view images. However, the disparity range allowable for the light field is limited because the estimation becomes less accurate as the range of disparities become larger. To overcome this limitation, we developed a new method called sheared EPI analysis, where EPIs are sheared before the structure tensor analysis. The results of analysis obtained with different shear values are integrated into a final disparity map through a smoothing process, which is the key idea of our method. In this paper, we closely investigate the performance of sheared EPI analysis and demonstrate the effectiveness of the smoothing process by extensively evaluating the proposed method with 15 datasets that have large disparity ranges.