A behavioral model for ferroelectric capacitors is developed. There are two requirements for the circuit simulation model; one is to reproduce the hysteretic behavior of the polarization under arbitrary voltage history, and the other is to describe the time dependence of polarization change. A parallel element model has been proposed to meet the first requirement. This model reproduces the minor loops of the hysteresis by assuming that the ferroelectric capacitor consists of the parallel capacitors of different polarization and coercive voltages. In order to add the function to describe the time dependence of the polarization change, we propose a method of measuring the switching response for individual parallel elements and the model which describes the response. In the measurement, the voltage applied to the capacitor is raised in two steps. After the first step, the voltage is kept at an intermediate level for a period of time, then raised again to the final level and the polarization change was recorded as a function of time. Because the capacitor elements with the coercive voltage lower than the intermediate level complete switching during the first step, the polarization change of the whole capacitor during the second step is attributed to the capacitor elements with the coercive voltage higher than the intermediate level. This procedure is repeated with changing the intermediate level, and the switching response of each capacitor element is obtained by taking the finite differences between the adjacent sets of data. The measurement on a sol-gel derived SrBi2Ta2O9 capacitor revealed that the switching time depended only on the difference between the applied voltage and the coercive voltage of each capacitor element. The time dependence of the polarization change is implemented to the model by inserting a nonlinear resistor in series with each capacitor, which reproduces the polarization switching under arbitrary voltage change without any fitting parameters.

In order to realize stable n-type characteristics of pentacene for applying to the organic complementary metal-oxide-semiconductor field-effect transistors (CMOS), we have fabricated pentacene based MOS diodes using ultra-thin Yb layer such as 0.5-3 nm between gate insulator and pentacene. From the results of capacitance-voltage (C-V) measurements, excellent n-type C-V characteristics of the devices with 1 and 2 nm-thick Yb were observed even though the devices were measured in air. These results suggested that the n-type semiconductor characteristics of pentacene are able to be improved by the thin Yb interfacial layer. Furthermore, the improved n-type characteristics of pentacene will enable the fabrication of flexible complementary logic circuits utilizing one kind organic semiconductor.

The model to calculate high frequency C-V characteristics of ferroelectric capacitors that have not been modeled yet is presented. At first, P-V hysteresis model necessary to calculate C-V characteristics is improved by introducing two modification factors and by comparing with experimental results. Then, other parameters to express high frequency C-V characteristic of the metal/ferroelectric/metal structure are derived, in which the response for AC signal input is considered. Finally, it has been shown that these models predict well the C-V hysteresis shapes of the MFIS and the MFMIS structures.

An improved numerical computation model is presented to calculate the metal-ferroelectric-semiconductor field effect transistor (MFSFET) characteristics with a sufficiently large gate area which can be applied for large drain voltages. In the presented model, the polarization of the ferroelectric gate insulator is inhomogeneous and treated as a variable along the channel. We have calculated electrical properties of SrBi2Ta2O9/Si MFSFETs and demonstrate that the conventional model, in which the polarization of the ferroelectric gate insulator (Pd) is treated as a constant, overestimate the drain current when the drain voltage is large. In addition, effects of the ratio of remanent polarization to spontaneous polarization (Pr/Ps ratio) of the ferroelectric film on the transistor characteristics are discussed.

A 1T2C-type ferroelectric memory cell, in which two ferroelectric capacitors with the same area are connected to the gate of an usual MOSFET with a SiO2/Si interface, was fabricated and characterized. The relations between various device parameters and characteristics of memory cell were investigated by using SPICE simulation. It was found from the simulation results that the memory window significantly changed by the device parameters, which means that the operation voltage of the memory cell can be well controlled by these parameters. The fabricated cell is composed of a stacked gate structure of Pt/SBT/Pt/Ti/SiO2/Si with the area ratio of the MOS capacitor (SO) to the ferroelectric capacitor (SF) of 6 or 10. Nonvolatile memory operation was confirmed, and the obtained memory window coincided with the simulated results qualitatively. Furthermore, the current on/off ratio in the read-out operation was larger than 3-order-of magnitude and the data retention time was longer than 6 104 seconds. It was also predicted that low voltage operation was possible if the device parameters were optimized.

Pentacene-based organic field-effect transistors (OFETs) with SiO2 and HfON gate insulators have been fabricated, and the effect of gate insulator on the electrical properties of pentacene-based OFETs and the microstructures of pentacene films were investigated. It was found that the grain size for pentacene film deposited on HfON gate insulator is larger than that for pentacene film deposited on SiO2 gate insulator. Due to the larger grain size, pentacene-based OFET with HfON gate insulator shows better electrical properties compared to pentacene-based OFET with SiO2 gate insulator. Meanwhile, low-temperature (such as 140) fabricated pentacene-based OFET with HfON gate insulator was also investigated. The OFET fabricated at 140 shows a small subthreshold swing of 0.14 V/decade, a large on/off current ratio of 4 104, a threshold voltage of -0.65 V, and a hole mobility of 0.33 cm2/Vs at an operating voltage of -2 V.