This paper presents a 7-bit 1.5-GS/s time-interleaved (TI) SAR ADC. The scheme achieves better isolation between sub-ADCs thanks to embedding a track-and-hold (T/H) amplifier and reference voltage buffer in each sub-ADC. The proposed dynamic T/H circuit enables high-speed, low-power operation. The prototype is fabricated in a 65-nm CMOS technology. The total active area is 0.14,mm2 and the ADC consumes 36 mW from a 1.2-V supply. The measured results show the peak spurious-free dynamic range (SFDR) and signal-to-noise-and-distortion ratio (SNDR) are 52.4 dB and 39.6 dB, respectively, and an figure of Merit (FoM) of 300 fJ/conv. is achieved.

This paper presents an analog front-end circuit for a 60-GHz proximity wireless communication receiver. The feature of the proposed analog front-end circuit is a bandwidth more than 1-GHz wide. To expand the bandwidth of a low-pass filter and a voltage gain amplifier, a technique to reduce the parasitic capacitance of a transconductance amplifier is proposed. Since the bandwidth is also limited by on-resistance of the ADC sampling switch, a switch separation technique for reduction of the on-resistance is also proposed. In a high-speed ADC, the SNDR is limited by the sampling jitter. The developed high resolution VCO auto tuning effectively reduces the jitter of PLL. The prototype is fabricated in 65nm CMOS. The analog front-end circuit achieves over 1-GHz bandwidth and 27.2-dB SNDR with 224mW Power consumption.

A three-phase complex filter for a balanced three-phase analog signal processing is proposed. The proposed three-phase active-RC Tow-Thomas biquad complex filter can reduce total resistance by 10 percent, total capacitance by 25 percent, and power consumption by 22 percent compared to a conventional fully differential quadrature complex one.

A new gain enhancement technique for an operational amplifier (opamp) using a replica amplifier is presented to reduce a sensitivity of a gain mismatch between the main amplifier and the replica amplifier which limits a gain-enhancement factor in the conventional replica-amp techniques. In the proposed technique, the replica amplifier is used to only amplify an error voltage of the main amplifier. The outputs of the main amplifier and the replica amplifier are added to cancel the error voltage of the main amplifier. The proposed technique can also achieve a higher output voltage swing because the replica amplifier amplifies only the error voltage. In case of using a fully-differential common-source opamp for the main amplifier and a telescopic opamp for the replica amplifier, Monte Carlo simulation at 100 iterations shows that the proposed amplifier has almost the same gain variation with 15.5dB gain enhancement and about five times output voltage swing expanding for a supply voltage of 1.2V compared with the single closed-loop amplifier using the telescopic opamp.