An innovative small planar packaging(SPP)system is described that can be combined with card-on-board(COB)packaging in high-speed asynchronous transfer mode switching systems with throughput of over 40-Gb/s. The SPP system provides high I/O pin count density and high packaging density, combining the advantages of both planar packaging used in computer systems and COB packaging used in telecommunication systems. Using a newly developed quasi-coaxial zero-insertion-force connector, point-to-point 311 Mb/s of 8-bit parallel signal transmission is achieved in an arbitrary location on the SPP systems shelf. Also about 5400 I/O connections in the region of the planar packaging system are made, thus the SPP system effectively eliminates the I/O pin count limitation. Furthermore, the heat flux management capability of the SPP system is five times higher than of conventional COB packaging because of its air flow control structure. An SPP system can easily enlarge the switch throughput and it will be useful for future high-speed, high-throughput ATM switching systems.

This paper describes an innovative heat-pipe cooling technology for asynchronous transfer mode (ATM) switching multichip modules (MCMs) operating with a throughput of 40 Gb/s. Although high-speed ATM link-wires are connected at the top surface of the MCMs, there is no room to cool the MCM by forced air convection, because power and the system clock signal are supplied by connectors on the rear and periphery of the MCM. We therefore chose to attach a cold-plate to the back of each MCM. The condenser part of the heat pipe, which is mounted behind the power supply printed circuit board, is cooled by low-velocity forced air. Total power dissipation is about 30 watts per MCM. With a 2 m/s foreced airflow, the sub-switching-element module (four MCMs) operates at a throughput of 80 Gb/s with a maximum junction temperature of less than 85. Measured thermal resistance between the switch LSI junction and air is about 6/W. This heat-pipe cooling system has a small system footprint, compact hardware, and good cooling capacity.

This paper describes advanced ATM switching system hardware that uses a high-performance and cost-effective MCM-D module as an ATM-layer function device. The MCM-D module is fabricated on a Si-substrate using the stacking RAM technique to reduce module size. The MCM has a 4-layer Si substrate, a high-performance ASIC, 8 high-speed SRAMs, and an FPGA. By using the stacking RAM technique, MCM-D module size is reduced to 50. 8 mm 50. 8 mm. This is 40% of that (100 mm 65 mm) of a double-side mounted sub-board module with conventional packaging (QFP and SOP). The MCM-D module realizes the ATM-layer functions that require a high-performance ASIC with a high-speed (access time 20 ns) and large-capacity (1 MBytes) SRAM cache. The MCM approach is quite effective in increasing memory access speed because it realizes high-density packaging. The MCM-D module is mounted on an ATM line interface circuit, and realizes 150 Mbit/s throughput ATM-layer functions (header conversion and on-line monitoring) in an ATM switching system. In addition, advanced ATM switching system hardware technologies with sub-module structure are also described. The MCM-D module is one of the sub-modules of the system. This MCM technology and sub-module technology can be applied to advanced ATM switching systems.

Threshold-voltage instability of MOS transistors in an LSI memory under accelerated operating test conditions at 77K has been studied. It is found that the dominant cause of threshold-voltage instability at 77K is the generation of positive charge which may be associated with the dissociation of Si-H bonds by interaction with hot electrons injected into the gate-oxide.