This report presents Dual Field-modulating-Plates (Dual-FP) technology for a 28 V operated high power GaAs heterojunction FET (HJFET) amplifier. A developed HJFET has two FP electrodes; the 1st-FP is connected to the gate and the 2nd-FP to the ground. The 2nd-FP suppresses the drain current dispersion effectively cooperating with the 1st-FP, and it can also reduce the gate-drain parasitic capacitance. The developed push-pull amplifier, with four Dual-FPFET chips, demonstrated 55.1 dBm (320 W) output power with a 14.0 dB linear gain and a drain efficiency of 62% at 2.14 GHz. Under two-carrier W-CDMA signals, it showed a high drain efficiency of 30% and low third-order Inter-modulation distortion of -37 dBc at output power of 47.5 dBm.

A new structure GaAs power FET was designed and fabricated for high output power with sufficiently high efficiency. The undoped surface layer was introduced to achieve simultaneous increase in the maximum channel current (Imax) and the gate drain breakdown voltage (BVgd) under the large signal RF conditions. In addition the step-recessed gate structure was adopted and optimized to attain a high breakdown voltage and a high linear gain by using the two dimensional device simulator. A high fmax of 65 GHz was obtained at the "class-A" mode bias point, with the 0.55 µm gate length. The maximum fmax of 91 GHz was obtained. The test device feasibility was tested at 12 GHz and the output power/efficiency characteristics of 4.0 W/40.1% with the gain of 9.2 dB have been achieved in the "class-A" mode operation for a single chip (gate width8.18 mm). To the authors' knowledge, these RF power performances with high linear gain are the best data at 12 GHz.

This paper describes a high-power and low-distortion AlGaAs/GaAs HFET amplifier developed for digital cellular base station system. We proved experimentally that distortion characteristics such as IMD (Intermodulation Distortion) or NPR (Noise Power Ratio) are drastically degraded when the absolute value of the drain bias circuit impedance at low frequency are high. Based on the experimental results, we have designed the drain bias circuit not to influence the distortion characteristics. The developed amplifier employed two pairs of pre-matched GaAs chips mounted on a single package and the total output-power was combined in push-pull configuration with a microstrip balun circuit. The push-pull amplifier demonstrated state-of-the-art performance of 140 W output-power with 11.5 dB linear gain at 2.2 GHz. In addition, it exhibited extremely low distortion performance of less than 30 dBc at two-tone total output-power of 46 dBm. These results indicate that the design of the drain bias circuit is of great importance to achieve improved IMD characteristics while maintaining high power performance.