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[Author] Takashi UENO(3hit)

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  • 1.9 GHz Si Direct Conversion Receiver IC for QPSK Modulation Systems

    Chikau TAKAHASHI  Ryuichi FUJIMOTO  Satoshi ARAI  Tetsuro ITAKURA  Takashi UENO  Hiroshi TSURUMI  Hiroshi TANIMOTO  Shuji WATANABE  Kenji HIRAKAWA  

     
    PAPER-Active Devices

      Vol:
    E79-C No:5
      Page(s):
    644-649

    A 1.9GHz direct conversion receiver(DCR) chip which integrates an LNA, I/Q mixers(MIX), active lowpass filters(LDF) and variable gain amplifiers(VGA) was fabricated. Because the DCR for QPSK modulation systems is sensitive to the 2nd-order nonlinearity, linearization techniques are adopted in MIX and LPF. The DCR chip was fabricated using a BiCMOS process, and the die size is 5.1 mm by 5.1mm. The chip can operate from 2.7 V supply voltage and consumes 165mW when all the functions are activated. Suppression of local signal radiation and the 2nd-order distortion indicate the feasibility of Si-based DCR for QPSK modulation systems such as PHS.

  • A 2-Vpp Linear Input-Range Fully Balanced CMOS Transconductor and Its Application to a 2.5-V 2.5-MHz Gm-C LPF

    Tetsuro ITAKURA  Takashi UENO  Hiroshi TANIMOTO  Tadashi ARAI  

     
    PAPER-Analog Signal Processing

      Vol:
    E83-A No:11
      Page(s):
    2295-2302

    A fully balanced (FB) transconductor using two multi-input single-ended (SE) CMOS transconductors is proposed, where the transconductors use MOS transitors operating in a triode region for achieving a wide linear input-range. SE circuits are easier to design than differential circuits and inherently reject common-mode (CM) signals. The multi-input structure is used to make a CM feedback loop and to determine an output CM voltage. A high-output-resistance current mirror is used in converting a differential signal to a single-ended signal in order to achieve a high common-mode rejection ratio (CMRR) and a high output-resistance of the transconductor. The FB transconductor achieves a 2-Vpp linear input range at a 2.5-V power supply and consumes 1.74 mA. The output resistance of the FB transconductor is 2 MΩ. It operates at 2 V with a linear input-range of 1.2 Vpp and at 1.6 V with a linear input-range of 0.9 Vpp. A 2.5-V 2.5-MHz FB Gm-C filter using the FB transconductors achieved a CMRR of 45 dB and a passband IIP3 of 32 dBm.

  • Design of Fully Balanced Analog Systems Based on Ordinary and/or Modified Single-Ended Opamps

    Zdzis taw CZARNUL  Tetsuro ITAKURA  Noriaki DOBASHI  Takashi UENO  Tetsuya IIDA  Hiroshi TANIMOTO  

     
    INVITED PAPER

      Vol:
    E82-A No:2
      Page(s):
    256-270

    The system architectures, which allow a high performance fully balanced (FB) system based on ordinary/modified single-ended opamps to be implemented, are investigated and the basic and general requirements are formulated. Two new methods of an FB analog system design, which contribute towards achieving both a high performance IC system implementation and a great reduction of the design time are presented. It is shown that a single-ended system based on any type of opamp (rail-to-rail, constant gm, etc. ), realized in any technology (CMOS, bipolar, BiCMOS, GaAs), can be easily and effectively converted to its FB counterpart in a very practical way. Using the proposed rules, any FB system implementation with opamps (data converter, modulator, filter, etc. ) requires only a single-ended system version design and the drawbacks related to a conventional FB system design are avoided. The principles of the design are pointed out and they are verified by experimental results.