The accuracy of the comparator, which is often determined by its offset, is essential for the resolution of the high performance mixed-signal system. Various design efforts have been made to cancel or calibrate the comparator offset due to many factors like process variations, device thermal noise and input-referred supply noise. However, effective and simple method for offset cancel by applying additional circuits without scarifying the power, speed and area is always challenging. This work explores a dynamic offset control technique that employs charge compensation by timing control. The charge injection and clock feed-through by the latch reset transistor are investigated. A simple method is proposed to generate offset compensation voltage by implementing two source-drain shorted transistors on each regenerative node with timing control signals on their gates. Further analysis for the principle of timing based charge compensation approach for comparator offset control is described. The analysis has been verified by fabricating a 65 nm CMOS 1.2 V 1 GHz comparator that occupies 25 65 µm2 and consumes 380 µW. Circuits for offset control occupies 21% of the areas and 12% of the power consumption of the whole comparator chip.

Charge redistribution based successive approximation (SA) analog-to-digital converter (ADC) has the advantage of power efficiency. Split capacitor digital-to-analog converter (CDAC) technique implements two sets of binary-weighted capacitor arrays connected by a bridge capacitor so as to reduce both input load capacitance and area. However, capacitor mismatches degrade ADC performance in terms of DNL and INL. In this work, a split CDAC mismatch calibration method is proposed. A bridge capacitor larger than conventional design is implemented so that a tunable capacitor can be added in parallel with the lower-weight capacitor array to compensate for mismatches. To guarantee correct CDAC calibration, comparator offset is cancelled using a digital timing control charge compensation technique. To further reduce the input load capacitance, an extra unit capacitor is added to the higher-weight capacitor array. Instead of the lower-weight capacitor array, the extra unit capacitor and the higher-weight capacitor array sample analog input signal. An 8-bit SA ADC with 4-bit + 4-bit split CDAC has been implemented in a 65 nm CMOS process. The ADC has an input capacitance of 180 fF and occupies an active area of 0.03 mm2. Measured results of +0.2/-0.3LSB DNL and +0.3/-0.3LSB INL have been achieved after calibration.

We propose a CMOS image sensor that realizes wide dynamic range imaging and nonlinear representation of I/O characteristics. The proposed image sensor controls the integration time for each pixel based on the brightness distribution of objects. The histogram at the end of the integration is estimated from the early intermediate photodiode values that are read out to an external circuit. Using the estimated histogram, the imaging parameters, which control the integration time pixel-by-pixel, are optimized in the external circuit. According to the imaging parameters, the intermediate photodiode value is compared with the threshold and reset to the starting value depending on the comparison result. These processes repeat several times. At the end of the integration, the photodiode value is reconstructed by using the imaging parameters. Then, wide dynamic range images with adapted I/O characteristics are obtained. We have fabricated a prototype with a size of 6464 pixels using a 0.35-µm 2-poly 4-metal CMOS process. In this paper, we explain the principle of the proposed sensor and discuss the system architecture and its operation. The experimental results obtained using the prototype are also presented, and we verify its effectiveness.

We have studied an image acquisition system for a real-time image- based rendering (IBR) system. In this area, most conventional systems sacrifice spatial or temporal resolution for a large number of input images. However, only a portion of the image data is needed for rendering, and the portion required is determined by the position of the imaginary viewpoint. In this paper, we propose an acquisition system for a real-time image-based rendering system that uses pixel-based random-access image sensors to eliminate the main bottleneck in conventional systems. We have developed a prototype CMOS image sensor, which has 128 128 pixels. We verified the prototype chip's selective readout function. We also verified the sample & hold feature.

An overlay traffic control is a way to provide flexible and deployable QoS mechanisms over existing networks, such as the Internet. While most of QoS mechanisms proposed so far require router supports, overlay QoS mechanisms rely on traffic control at transport layer without modifying existing routers in the network. Thus, traffic control algorithms, which are implemented at traffic sources or PEPs (Performance Enhancement Proxies), play a key role in an overlay QoS mechanism. In this paper, we propose an end-to-end prioritization scheme using TCP-Westwood Low-Priority (TCPW-LP), a low-priority traffic control scheme that maximizes the utilization of residual capacity without intrusion on coexisting foreground flows. Simulation and Internet measurement results show that TCPW-LP appropriately provides end-to-end low-priority service without any router supports. Under a wide range of buffer capacity and link error losses, TCPW-LP appropriately defers to foreground flows and better utilizes the residual capacity than other proposed priority schemes or even TCP Reno.

This paper reports the evolution and application potential of image sensors with high-speed brightness gradient sensors. We propose an adaptive exposure time control method using the apparent motion estimated by this sensor, and evaluate results for the change in illuminance and global / local motion.

We propose a HDR (high dynamic range) reconstruction method in an image sensor with a pixel-parallel ADC (analog-to-digital converter) for non-destructively reading out the intermediate exposure image. We report the circuit design for such an image sensor and the evaluation of the basic HDR reconstruction method.

In this paper, we propose a high accuracy motion estimation method based on the spatio-temporal gradient method using high frame-rate images. In the method, we adopt spatial gradients with low estimated errors by the previous motion vectors. In addition, we evaluate the proposed method and confirm the effectiveness. Finally, we apply the method to super-resolution as an application of the proposed method.

We have investigated real-time object tracking using a wide view imaging system. For the system, we have designed and fabricated new smart image sensor with four functions effective in wide view imaging, such as a random access function. In this system, eight smart sensors and an octagonal mirror are used and each image obtained by the sensors is equivalent to a partial image of the wide view. In addition, by using an FPGA for processing, the circuits in this system can be scaled down and a panoramic image can be obtained in real time. For object tracking using this system, the object-detection method based on background subtraction is used. When moving objects are detected in the panoramic image, the objects are constantly displayed on the monitor at higher resolution in real time. In this paper, we describe the random access image sensor and show some results obtained using this sensor. In addition, we describe the wide view imaging system using eight sensors. Furthermore, we explain the method of object tracking in this system and show the results of real-time multipl-object tracking.

This paper presents a novel approach of analysing colour bleeding caused by image compression. This is achieved by isolating two components of colour bleeding, and evaluating these components separately. Although these specific components of colour bleeding have not been studied with great detail in the past, with the use of a synthetic test pattern -- similar to the colour bars used to test analogue television transmissions -- we have successfully isolated, and evaluated: "colour blur" and "colour ringing," as two separate components of colour bleeding artefact. We have also developed metrics for these artefacts, and tested these derived metrics in a series of trials aimed to test the colour reproduction performance of a JPEG codec, and a JPEG2000 codec -- both implemented by the developer IrfanView. The algorithms developed to measure these artefact metrics proved to be effective tools for evaluating and benchmarking the performance of similar codecs, or different implementations of the same codecs.

For source camera identification, we propose a method to reconstruct the sensor pattern noise map from a size-reduced query image by minimizing an objective function derived from the observation model. Our method can be applied to multiple queries, and can thus be further improved. Experiments demonstrate the superiority of the proposed method over conventional interpolation-based magnification algorithms.

We propose a new sampling control system on image sensor array. Contrary to the random access pixels, the proposed sensor is able to read out spatially variant sampled pixels at high speed, without inputting pixel address for each access. The sampling positions can be changed dynamically by rewriting the sampling position memory. The proposed sensor has a memory array that stores the sampling positions. It can achieve any spatially varying sampling patterns. A prototype of 64 64 pixels are fabricated under 0.7 µm CMOS precess.

We aim at HDR imaging with simple processing while preventing spatial resolution degradation in multiple-exposure-time image sensor where the exposure time is controlled for each pixel. The contributions are the proposal of image interpolation by motion area detection and pixel adaptive weighting method by overexposure and motion blur detection.

In reconstruction-based super resolution, a high-resolution image is estimated using multiple low-resolution images with sub-pixel misalignments. Therefore, when only one low-resolution image is available, it is generally difficult to obtain a favorable image. This letter proposes a method for overcoming this difficulty for single- image super resolution. In our method, after interpolating pixel values at sub-pixel locations on a patch-by-patch basis by support vector regression, in which learning samples are collected within the given image based on local similarities, we solve the regularized reconstruction problem with a sufficient number of constraints. Evaluation experiments were performed for artificial and natural images, and the obtained high-resolution images indicate the high-frequency components favorably along with improved PSNRs.