A 2.7-V Si-bipolar quadrature modulator with a 90 phase shifter consisting of a frequency doubler and a master-slave flip-flop is described. The modulator operates over a wide bandwidth (0.95 to 1.88 GHz) without any tuning or adjustments. It is implemented using 20-GHz Si-bipolar technology and dissipates 97 mW at 2.7 V. An image ratio of less than -40 dBc is obtained between 1.1 and 1.8 GHz. Moreover, third-order harmonic products are less than -40 dBc and carrier leakage is less than -30 dBc.

This paper surveys trends in and prospects for low power LSI circuits technologies for portable terminal equipment, in which low-voltage operation of LSIs will be emphasized because this equipment will be battery-powered. Since this brings about serious operation speed degradation of LSIs, however, it will become more and more important how to operate them faster under low-supply voltage. We propose two new circuit techniques that make it possible to operate LSIs at high speed even when the supply voltage is very low (1-2 V corresponding to one or two battery cells). The new low-voltage RF LSI circuit technique, developed using silicon bipolar technology and using a novel current-folded mixer architecture for the modulator, result in a highly linear modulator that operates at 2 V. Its power consumption is less than 2/3 that of previously reported ICs. And for a low voltage baseband LSI we propose the multi-threshold CMOS (MTCMOS) technique, which uses two sets of threshold-voltage levels so that the LSI can operate at high speed when driven by a 1-V power supply. The multi-threshold CMOS architecture enabled us to create LSIs that operate faster than conventional CMOS circuits using high-threshold-voltage MOSFETs. When operating with a 1-V power supply, our LSIs are three times faster than the conventional ones.

A high-image-rejection wireless receiver with an N-phase active RC complex filter is proposed and analyzed. Signal analysis shows that the double-conversion receiver with (N+N2) mixers corrects the gain and phase mismatches of the adjacent image. Monte Carlo simulations evaluate the relation between image-rejection performances and the dispersions of device parameters for the double-conversion wireless receiver. The Monte Carlo simulations show that the image rejection ratio of the adjacent image depends almost only on R and C mismatches in the complex filter.

RF integration, until recently the integration of active devices in conventional architectures suitable for discrete-component circuits, is now turning into full-integration based on new architectures developed specifically for an LSI technology. This paper reviews some of the key existing and emerging circuit techniques and discusses the serious problem of crosstalk. In order to develop miniature and low power RF transceivers, direct-conversion and monolithic VCO's will be further studied. Silicon bipolar technology will still be playing major role beyond the year 2,000, and CMOS will also be used in certain applications.

A 1-V 2-GHz receiver that exhibits an image rejection of 49 dB is described. It consists of a low-noise amplifier, a quadrature mixer and on-chip polyphase filters, and was fabricated by 0.2-µm fully depleted CMOS/SIMOX technology. The quadrature mixer employs an LC-tuned folded structure with a common RF input for I and Q channels. This enables 1-V operation, suppresses phase errors in LO signals, and improves the image-rejection performance by about 15-dB compared to a conventional quadrature architecture. The current source of the single-to-balance converter at the mixer input consists of a transistor and an LC tank in a cascode configuration. This enhances its output impedance and improves its common-mode-rejection ratio (CMRR) and the IIP2 characteristics of the receiver. The chip consumes 12 mW with 1-V power supply. The receiver provides an NF of 10 dB with an IIP3 of -15.8 dBm and IIP2 of 12.3 dBm.

This paper reports L-band and C-band monolithic low noise amplifiers (LNA) fabricated with MOSFET/SIMOX (Separation by IMplanted OXygen) technology for the first time. The L-band LNA exhibits a Gain/(PdcNF) ratio of 0.7/mW, which demonstrate the potential performance advantage of this technology. The C-band LNA has 0.05/mW at 5.8 GHz. The L-band amplifier had a gain of 8.5 dB at 0.5 V, which is the lowest supply voltage ever reported in Si-based LNAs. These LNAs consist of 0.25-µm nMOSFET/SIMOX, spiral inductors, and capacitors which are fabricated with a conventional digital CMOS LSI process. It demonstrates that L- and C-band RF circuits can be made on a SIMOX wafer together with large-scale digital circuits.

This paper describes a 2.4-GHz downconverter that runs on a 1-V supply. The downconverter integrates an LNA, a quadrature mixer, a complex channel-select band-pass filter (BPF), a limiting amplifier, and a frequency doubler using 0.2-µm CMOS/SOI technology. The frequency doubler doubles the frequency deviation of FM signals as well as the frequency itself, which in turn doubles the modulation index. This improves the sensitivity of FM demodulation. The power consumption of the downconverter is 23 mW with a 1-V power supply. A bit-error-rate (BER) measurement using the downconverter and a demodulation IC shows -76.5-dBm sensitivity at a 0.1% BER.

A 1-V 2.4-GHz-band fully monolithic PLL synthesizer was fabricated in 0.2-µm CMOS/SOI process technology. It includes a voltage-controlled oscillator (VCO) and a 3-GHz fully differential dual-modulus prescaler on a chip. A low-off-leakage-current charge pump is used for open-loop FSK modulation. When the PLL is in the open loop mode, the frequency drift of the output is lower than 2.5 Hz/µsec. The output phase noise is -104 dBc/Hz at 1-MHz offset frequency. The power consumption of the PLL-IC core is 17 mW at 1-V supply voltage. This PLL synthesizer is suitable for a 1-V Bluetooth RF transceiver LSI.

A 3 to 5-GHz Si-bipolar quadrature modulator and demodulator are described. Both feature a wideband frequency-doubling 90-degree phase shifter that has a mechanism for self-correction of phase errors caused by an original 90-degree phase-shift network at the half frequency of the carrier. Therefore, the phase shifter produces accurate quadrature carrier signals with doubled frequency. The quadrature modulator and demodulator in 30-GHz Si bipolar technology dissipate 80 mA at a 3-V supply. Image rejection of the modulator is more than 40 dB between 3.2 to 5.2 GHz. The phase and amplitude errors of the demodulator are less than 1.5 degrees and less than 0.15 dB, respectively, between 3.5 to 5.2 GHz. Therefore, both are suitable for either direct conversion or image-rejection transceivers for 5-GHz applications.

A low-voltage 6-GHz-band monolithic LC-tank VCO has been fabricated using 0.2-µm CMOS/SIMOX process technology. The VCO features a tuning-range switching technique to achieve a wide tuning range. The output frequency range is between 5.71 and 6.21 GHz owing to the tuning-range switch. With the tuning-range switch on or off, the phase noise is about -100 dBc/Hz at 1-MHz offset and about -120 dBc/Hz at 10-MHz offset frequency at the supply voltage of 2 V.

A low-voltage silicon-on-insulator (SOI) voltage-reference circuit has been developed. It is based on threshold-voltage-summation architecture and the output is not affected by the input offset of the feedback amplifier. Thus, the output dispersion is considerably reduced. An undoped MOSFET is used as a depletion-mode transistor because of its small threshold voltage. The temperature dependence of normal and undoped MOSFETs in fully depleted CMOS/SOI technology is studied for designing a temperature-insensitive voltage-reference circuit. A prototype circuit, fabricated on a fully depleted CMOS/SIMOX process, has a measured reference voltage of 530 16.8 mV (3σ), and can operate at a supply voltage as low as 0.6 V. The measured temperature coefficient is 0.02 0.06 mV/ (3σ).

Mixed-signal LSIs promise to permit increased levels of integration, not only in voiceband but also in multi-GHz-band applications such as wireless communications and optical data links. This paper reviews the evolution of mixed-signal communications LSIs and discusses some of their design problems, including device noise and crosstalk noise. In the low-power and low-voltage designs emerging as new disciplines, the target supply voltage for voiceband LSIs is around 1 V, and even GHz-band circuits are approaching 2 V. MOS devices are expected to play an important role even in the frequency range over 100 MHz, in the area of wireless or optical communications circuits.

A 2-GHz monolithic Si-bipolar logarithmic/ limiting amplifier is described. It features a waveform-dependent current phase shifter that compensates for the intrinsic dependence of unit-amplifier phase shifts on input signal amplitudes and layout techniques that minimize crosstalk in Si substrate. The amplifier dissipates 250 mW at a 3-V supply, which is less than 1/4 of that of previously reported ICs. The dynamic range of a received signal strength indicator (RSSI) is 60 dB and the limited-output phase deviation is less than 7 deg. at 2 GHz. Therefore, this amplifier is quite suitable for single-conversion transceivers for broadband wireless access systems.

The performance of radio frequency integrated circuits (RFICs) in silicon-on-insulator (SOI) technology can be improved by using a high-resistivity SOI substrate. We investigated the correlation between substrate resistivity and the performance of a low noise amplifier (LNA) on ELTRAN(R) SOI-Epi wafersTM, whose resistivity can be controlled precisely. The use of high-resistivity ELTRAN wafers improves the Q-factor of spiral inductors, and thereby increases the gain and narrows the bandwidth of the LNA. Using the high-resistivity ELTRAN wafers, we have successfully fabricated a 2.4-GHz and 5-GHz CMOS LNA in 0.35-µm SOI CMOS technology, whose process cost is lower than the latest CMOS technologies.