A 1-V 2.4-GHz-band fully monolithic PLL synthesizer was fabricated in 0.2-µm CMOS/SOI process technology. It includes a voltage-controlled oscillator (VCO) and a 3-GHz fully differential dual-modulus prescaler on a chip. A low-off-leakage-current charge pump is used for open-loop FSK modulation. When the PLL is in the open loop mode, the frequency drift of the output is lower than 2.5 Hz/µsec. The output phase noise is -104 dBc/Hz at 1-MHz offset frequency. The power consumption of the PLL-IC core is 17 mW at 1-V supply voltage. This PLL synthesizer is suitable for a 1-V Bluetooth RF transceiver LSI.
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Akihiro YAMAGISHI, Mamoru UGAJIN, Tsuneo TSUKAHARA, "A 2.4-GHz PLL Synthesizer for a 1-V Bluetooth RF Transceiver" in IEICE TRANSACTIONS on Electronics,
vol. E87-C, no. 6, pp. 895-900, June 2004, doi: .
Abstract: A 1-V 2.4-GHz-band fully monolithic PLL synthesizer was fabricated in 0.2-µm CMOS/SOI process technology. It includes a voltage-controlled oscillator (VCO) and a 3-GHz fully differential dual-modulus prescaler on a chip. A low-off-leakage-current charge pump is used for open-loop FSK modulation. When the PLL is in the open loop mode, the frequency drift of the output is lower than 2.5 Hz/µsec. The output phase noise is -104 dBc/Hz at 1-MHz offset frequency. The power consumption of the PLL-IC core is 17 mW at 1-V supply voltage. This PLL synthesizer is suitable for a 1-V Bluetooth RF transceiver LSI.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e87-c_6_895/_p
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@ARTICLE{e87-c_6_895,
author={Akihiro YAMAGISHI, Mamoru UGAJIN, Tsuneo TSUKAHARA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A 2.4-GHz PLL Synthesizer for a 1-V Bluetooth RF Transceiver},
year={2004},
volume={E87-C},
number={6},
pages={895-900},
abstract={A 1-V 2.4-GHz-band fully monolithic PLL synthesizer was fabricated in 0.2-µm CMOS/SOI process technology. It includes a voltage-controlled oscillator (VCO) and a 3-GHz fully differential dual-modulus prescaler on a chip. A low-off-leakage-current charge pump is used for open-loop FSK modulation. When the PLL is in the open loop mode, the frequency drift of the output is lower than 2.5 Hz/µsec. The output phase noise is -104 dBc/Hz at 1-MHz offset frequency. The power consumption of the PLL-IC core is 17 mW at 1-V supply voltage. This PLL synthesizer is suitable for a 1-V Bluetooth RF transceiver LSI.},
keywords={},
doi={},
ISSN={},
month={June},}
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TY - JOUR
TI - A 2.4-GHz PLL Synthesizer for a 1-V Bluetooth RF Transceiver
T2 - IEICE TRANSACTIONS on Electronics
SP - 895
EP - 900
AU - Akihiro YAMAGISHI
AU - Mamoru UGAJIN
AU - Tsuneo TSUKAHARA
PY - 2004
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E87-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2004
AB - A 1-V 2.4-GHz-band fully monolithic PLL synthesizer was fabricated in 0.2-µm CMOS/SOI process technology. It includes a voltage-controlled oscillator (VCO) and a 3-GHz fully differential dual-modulus prescaler on a chip. A low-off-leakage-current charge pump is used for open-loop FSK modulation. When the PLL is in the open loop mode, the frequency drift of the output is lower than 2.5 Hz/µsec. The output phase noise is -104 dBc/Hz at 1-MHz offset frequency. The power consumption of the PLL-IC core is 17 mW at 1-V supply voltage. This PLL synthesizer is suitable for a 1-V Bluetooth RF transceiver LSI.
ER -