A 1/2 frequency divider using resonant-tunneling hot electron transistors (RHETs) has been proposed and demonstrated. The circuit make the best use of negative differential conductance, a feature of RHETs, and contains one half transistors than used in conventional circuits. The RHETs were fabricated using self-aligned InGaAs RHETs and WSiN thin-film resistors on a single chip. The RHETs have an i-InGaAlAs/i-InGaAs collector barrier that improves the current gain at low collector-base voltages. Circuit operation was confirmed at 77 K.

In this paper an approach to formal specification and verification of ISDN services in LOTOS is presented. As for specification, it is shown that LOTOS can be effectively applied to describe different levels of ISDN service specifications. At the higher level, only the external behaviour of the network is specified. On the other hand, at the lower level, specifications include the behaviour of network components such as switching systems, where each switching system can be specified independently of each other. Such specification style, proves suitable for verification of specifications by using the concepts of the simulation relation.

In this paper the three dimensional (3-D) effect on CMOS latch-up is modeled using a graphical technique based on the fundamental principle of "charge neutrality or its current continuity equivalent" in the base region of parasitic transistors involved in latch-up. The graphical generation of the complete latch-up I-V characteristic requires as an input the SPICE parameters of the relevant bipolar and MOS transistors, the values of shunt resistances and the reverse current-voltage characteristic of the well-substrate junction. The infiuence of the MOS transistor shunting the parasitic bipolar transistors has received special attention. The nonideal scaling of the parasitic resistances has been observed to be the most crucial parameter determining the 3-D nature of the device. The proposed model is validated with test-structures fabricated in 2 µm bulk CMOS technology at and above room temperature. SAFE space map is constructed with width W as a parameter.

Weather conditions affect the performance of satellite broadcasting receiving systems. For example, snow accretion on antennas degrades G/T seriously because it reduces received signal power and also can increase antenna noise. We need a continuous measurement of G/T to evaluate the effect of the weather conditions to the satellite broadcasting receiving systems. However, a conventional method cannot perform the continuous measurement because the antenna under test must be oriented in a specific direction (to the zenith) to obtain a noise level in a satellite broadcasting channel. This paper presents the continuous measurement of G/T for the satellite broadcasting receiving systems. We describe details of the measurement method. In our measurement system, a standard antenna is placed at the inside of a room in order to prevent the weather conditions from affecting the gain of the standard antenna. The power flux density at the inside of the room is different from that at the outside where the antennas under test are placed. Employing the effective gain of the standard antenna, we take the difference of the power flux density into account. Moreover, we propose a method to estimate the noise level in the satellite broadcasting channel from the values at the outside of the channel, and clarify the accuracy of the noise estimation. Then, we show measurement results of the G/T values for several receiving systems. From these results, we show that the G/T measurement system has high precision. Also, from the specifications of the antenna gain and typical values of the noise figure, it is expected that the measurement system has a sufficient accuracy.

Telecommunication services are accomplished by cooperative networks of widely distributed communication processes and service users. Those specifications are often modeled by a set of possible message sequences among cooperating processes and users. The distributed and cooperative nature of telecommunication services results in a wide variety of message sequences and makes it more difficult for service designers to design such telecommunication services. To mitigate the difficulty, we propose a design support system with MSRs (message sequence rules) as design knowledge. The system supports the following two design activities: (1) specification of a typical message sequence that corresponds to a service behavior in a successful case, and (2) specification of incidentally possible message sequences that involve service behaviors in successful and unsuccessful cases. For the former activity, the system interacts with designers and identifies the messages they give with MSRs to understand the context of the message sequence and suggest possible subsequent messages. For the latter activity, the system applies MSRs to the typical message sequence and reasons possible messages from/to relevant processes and users under every state to suggest incidentally possible message sequences. Accordingly, designers may be relieved of investigating a wide variety of service behaviors in successful and unsuccessful cases. The system capability is based on MSRs equivalent to reusable message sequence components. MSRs can be obtained through abstraction of implementation-dependent messages and decomposition of those sequences into temporal relations among messages. The rule acquisition method provides MSRs with the potential to generate a wide variety of message sequences. In order to verify rule applicability, we have experimentally designed three kinds of services and conducted an experimental rule application to those specifications. The experimental evaluation results indicate that applicability is fairly high.

The authors design a simple feed system for a planar slotted waveguide array. A waveguide π-junction with negligible reflection is cascaded to compose a multiple-way power divider. The frequency characteristics of the power divided to each port and the reflection at the feed point are discussed and high performances are predicted. The maximum number of cascaded junctions in this system can be determined in terms of a desired frequency bandwidth and allowable deviation in divided power.

Surveillance capabilities and operational requirements for future Space-based radar systems are considered. With special attention paid to Air Traffic Control applications, an optimal system architecture is defined. The resulting large antenna dimensions call for novel solutions such as distributed arrays in space.

This study proposes a new training method for hidden Markov model with separate vector quantization (SVQ-HMM) in speech recognition. The proposed method uses the correlation of two different kinds of features: cepstrum and delta-cepstrum. The correlation is used to decrease the number of reestimation for two features thus the total computation time for training models decreases. The proposed method is applied to Japanese language isolated dgit recognition.

This paper designs and evaluates highly parallel VLSI processors for real time 2-D state-space digital filters using hierarchical behavioral description language and synthesizer. The architecture of the 2-D state-space digital filtering system is a linear systolic array of homogeneous VLSI processors, each of which consists of eight processing elements (PEs) executing 1-D state-space digital filtering with multi-input and multi-output. Hierarchical behavioral description language and synthesizer are adopted to design and evaluate PE's and the VLSI processors. One 16 bit fixed-point PE executing a (4, 4)-th order 2-D state-space digital filtering is described on the basis of distributed arithmetic in about 1,200 steps by the description language and is composed of 15 K gates in terms of 2 input NAND gate. One VLSI processor which is a cascade connection of eight PEs is composed of 129 K gates and can be integrated into one 1515 [mm2] VLSI chip using 1 µm CMOS standard cell. The 2-D state-space digital filtering system composed of 128 VLSI processors at 25 MHz clock can execute a 1,0241,024 image in 1.47 [msec] and thus can be applied to real-time conventional video signal processing.

The main objective of this paper is to propose a new top-down subcube allocation scheme which has complete subcube recognition capability with quick response time. The proposed subcube allocation scheme, called Heuristic Subcube Allocation (HSA) strategy, is based on a heuristic and undirected graph, called Subcube (SC)-graph, whose vertices represent the free subcubes, and edge represents inter-relationships between free subcubes. It helps to reduce the response time and internal/external fragmentation. When a new subcube is released, the higher dimension subcube is generated by the cycle detection in the SC-graph, and the heuristic is used to reduce the allocation time and to maintain the dimension of the free subcube as high as possible. It is theoretically shown that the HSA strategy is not only statically optimal but also it has a complete subcube recognition capability in a dynamic environment. Extensive simulation results show that the HSA strategy improves the performance and significantly reduces the response time compared to the previously proposed schemes.

Syntax-directed editors have several advantages in editing programs because programming is guided by the syntax and free from syntax errors. Nevertheless, they are less popular than text editiors. One of the reason is that they force a priori specified editing structures on the user and do not allow him to use his own structure. ACE (Algorithmically Customizable syntax-directed Editor) provides a solution for this problem by using a technique of machine learning; ACE has a special function of customizing the grammar algorithmically and interactively based on the learning method for grammars from examples and queries. The grammar used in the editor is customized through interaction with the user so that the user can edit his program in a more familiar structure. The customizing function has been implemented based on the methods for learning of context-free grammars from structural examples, for which the correctness and the efficiency are proved formally. This guarantees the soundness and the efficiency of customization. Furthermore, ACE can be used as an algorithmic and interactive tool to design grammars, which is required for several purposes such as compiler design and pretty-printer design.

The introduction of Integrated Services Digital Networks (ISDNs) poses a variety of new questions on telecommunications network design and planning. Furthermore, the formulation of traditional network design and planning problems need to be revisited in the ISDN context. This paper presents an overview of the recent progress and new challenges in developing ISDN design and planning methodologies that exploit revolutionary new telecommunications technologies. It will cover some important issues for ISDN design and planning, and will concentrate on three issues that are of particular importance: Design of networks with digital information transfer capabilities, design of networks with advanced network/traffic control techniques, and use of reliability objectives for network design and planning.

Bifurcations of the periodic solutions of the space-clamped Hodgkin-Huxley equations for the muscle membrane are studied regarding the chloride conductance as a parameter. A limit cycle appears at a Hopf bifurcation and disappears at a homoclinic orbit. With high sodium permeability, a subcritical period doubling bifurcation occurs before it disappears.

A new timing driven placement method based on the fuzzy theory is proposed. In this method, the longest path delay, the chip area and the wire length can be simultaneously minimized. Introducing the probability measures of fuzzy events, falling down into the optimal solutions can be avoided.

A formula for the variations in vertex-potentials caused by an increase of an edge-weight is derived using topological methods. This formula can be expressed in terms of the increase of the weight and the potential differences between two vertices joined by the edge with respect to three ordered vertex-pairs in the original network before the weight is increased.

An integrated multiplexer in intermediate node is analyzed. The multiplexer is modeled as a system with multiple synchronous servers (channels) and having two kinds of customers. Between the two, one is wideband (WB) and the other is narrowband (NB); they are queueable with the same deterministic service time. The WB customer is given higher priority of channel access than the NB. To incorporate the delay constraint of WB, we use a simple instant discarding scheme for WB. As a result, the system states defined just after the beginning of a slot form an one-dimensional embedded Markov chain. This makes the analysis computationally tractable. The performance measures such as queue length distribution, average blocking probability, and average waiting time are obtained, particularly, the waiting time distribution. Some interesting numerical examples are discussed. Simulation results are also provided to help verify the validity of analysis.

In this paper, restricted overflow strategy is proposed as a novel channel access strategy for the queueable hierarchical channel structure, which has been proposed as one of "Wideband-ISDN" channel structures. In this policy, overflow from higher bit rate channels to lower bit rate channels is partly restricted by the number of waiting customers in the higher channel's buffer. Therefore, thresholds, which restrict overflow, are considered on the buffer. First, we present the system model with two types of services and restricted overflow strategy. Next, we provide a queueing analysis of this strategy. After that, some numerical results of both conventional overflow strategy and restricted overflow strategy are presented, and we compare the average holding times under these strategies. Finally, we show that, if we choose appropriate thresholds, the average holding time of higher level traffic is improved.

In this paper, we present an automatic implementation method by which executable communication programs in C can be generated from protocol specifications in LOTOS. The implementation method consists of two parts: 1) An implementation strategy and 2) a set of translation rules. The first part consists of the basic ideas on how to realize the primary mechanisms in LOTOS specifications. The second part formulates the implementation method by way of the translation rules based on the implementation strategy. The characteristics of our method can be summarized as follows: We formulate our implementation method by way of translation rules. These rules are defined topdown in the form of syntax-directed translation function. The mechanism for controlling concurrency and communication among the user processes corresponding to the processes in LOTOS specification is easily realized by using UNIX operating system functions. The translation rules have been implemented on the AS 3000 (SUN3) workstation. An application of this implementation method is demonstrated by a simplified token-ring-protocol.