In this paper, an automatic retransmission request (ARQ) scheme for IEEE 802.11ac is presented, which can solve the problem of severe packet loss and greatly improve the performance in error-prone environments. The proposed solution only requires to be deployed on the sender and is compatible with the 802.11 protocol. The algorithm utilizes the basic strategy of sliding retransmission and then adds the method of copying frames. The media access control (MAC) protocol data unit (MPDU) lost in the transmission and the newly added data frame brought by the sliding window change are replicated. The scheme retransmits the duplicated aggregated packet and further improves the throughput by increasing the probability of successful transmission of sub-frames. Besides, we also establish a mathematical model to analyze the performance of the proposed scheme. We introduce the concept of average aggregated sub-frames and express the sliding retransmission strategy as the aggregated transmission of average aggregated sub-frames, thereby simplifying the model and effectively analyzing the theoretical throughput of the proposed algorithm. The simulation results of Network simulator 3 (NS-3) simulation results demonstrate that the performance of the proposed algorithm is better than the traditional sliding retransmission ARQ algorithm in error-prone channels with a higher physical layer rate.

Dense deployments of wireless local area network (WLAN) access points (APs) are accelerating to accommodate the massive wireless traffic from various mobile devices. The AP densification improves the received power at mobile devices; however, total throughput in a target area is saturated by inter-cell interference (ICI) because of the limited number of frequency channels available for WLANs. To substantially mitigate ICI, we developed and described a distributed smart antenna system (D-SAS) proposed for dense WLAN AP deployment in this paper. We also describe a system configuration based on our D-SAS approach. In this approach, the distributed antennas externally attached to each AP can be switched so as to make the transmit power match the mobile device's conditions (received power and packet type). The gains obtained by the antenna switching effectively minimize the transmission power required of each AP. We also describe experimental measurements taken in a stadium using a system prototype, the results show that D-SAS offers double the total throughput attained by a centralized smart antenna system (C-SAS).

This paper presents a high-throughput sliding block Viterbi decoder for IEEE 802.11ac systems. A 64-state bidirectional sliding block Viterbi method is proposed to meet the speed requirement of the system. The decoder throughput goes up to 640Mbps, which can be further increased by adding the block parallelism. Moreover, a modified add-compare-select (ACS) unit is designed to enhance the working frequency. The modified ACS unit obtains nearly 26% speed-up, compared to the conventional ACS unit. However, the area overhead and power dissipation are almost the same. The decoder is designed in a SMIC 0.13µm technology, and it occupies 1.96mm2 core area and 105mW power consumption with an energy efficiency of 0.1641nJ/bit with a 1.2V voltage supply.

This paper presents an adaptive interference-aware receiver for multiuser multiple-input multiple-output (MU-MIMO) downlink systems in wireless local area network (WLAN) systems. The MU-MIMO downlink technique is one of the key techniques that are newly applied to WLAN systems in order to support a very high throughput. However, the simultaneous communication of several users causes inter-user interference (IUI), which adversely affects receivers. Therefore, in order to prevent IUI, a precoding technique is defined at the transmitter based on feedback from the receiver. Unfortunately, however, the receiver still suffers from interference, because the precoding technique is prone to practical errors from the feedback quantization and subcarrier grouping scheme. Whereas ordinary detection schemes are available to mitigate such interference, such schemes are unsuitable because of their low performance or high computational complexity. In this paper, we propose an switching algorithm based on the norm ratio between an effective channel matrix for the desired signal and that of the interfering signals. Simulation results based on the IEEE 802.11ac standard show that the proposed algorithm can achieve near-optimal performance with a 70% reduction in computational complexity.

Thanks to the achievements in wireless technology, maximum data rate of wireless LAN systems was rapidly increased recently. As a key part of the WEP and the WPA security for the wireless LAN system, throughput of RC4 must be significantly improved also. This paper proposes two high throughput RC4 architectures. The first one is a RAM-based RC4 using a single of 256-byte tri-port RAM to store the S-box. The core generates 4bits of ciphering key per clock cycle. This paper also proves that 4bits/cycle is the maximum throughput can be achieved by a RAM-based RC4 circuit. The second architecture is a Register-based M-byte RC4 that uses a set of registers to store the S-box. It is able to generate multiple bytes of ciphering key per clock cycle, and is proposed as a novel solution for designing extremely high throughput RC4 core for future WLAN systems. Base on this proposal, a 4-byte RC4 core is developed (M=4). The synthesis results in 90nm ASIC show that: As the same throughput's requirement, the proposed RAM-based and Register-based RC4 can respectively save 60% and 50% of power consumption as compare to that of the most recently works. Moreover, the proposed Register-based design is the best candidate for achieving high throughput at low frequency.

As the demand for high-throughput communications in wireless LANs (WLAN) increases, the need for expanding channel bandwidth also increases. However, the use of wider band channels results in a decrease in the number of available channels because the total available bandwidth for WLAN is limited. Therefore, if multiple access points (APs) are in proximity and the cells overlap, it is difficult for each AP to use an orthogonal channel and competition increases between APs using the same channel. Coordination of APs is one promising approach; however, it is impractical to control all APs in WLAN systems. To cope with this problem, we proposed to analyze throughput performances of a multibandwidth channel selection by the coordinating APs at Nash equilibria, which can be considered as operating points for independent channel selection by APs. To clarify the effect of coordinating APs, we assume a simple scenario where the cells of three or more APs overlap, and each AP can select multibandwidth channels to maximize their own throughput. Through game-theoretic analysis, we find that the coordinated APs are able to select channels more effectively than if each AP independently selects channels. Consequently, the total throughput of the coordinated APs at Nash equilibria is significantly improved.

We present area- and power-efficient pipeline 128- and 128/64-point fast Fourier transform (FFT) processors for 8x8 multiple-input multiple-output orthogonal frequency multiplexing (MIMO-OFDM) systems based on the specification framework of IEEE 802.11ac WLANs. Our new FFT processors use mixed-radix multipath delay commutator (MRMDC) architecture from the point of view of low complexity and high memory use. A conventional MRMDC architecture induces large circuits in delay commutators, which change the order of data sequences for the butterfly units. The proposed architecture replaces delay elements with new commutators that cooperate with other MIMO-OFDM processing blocks. These commutators are inserted in the front and rear of the input and output memory units. Our FFT processors exhibit a 50–51% reduction in logic gates and 70–72% reduction in power dissipation as compared with conventional ones.