The self-organizing nature of ad hoc networks is a good aspect in that terminals are not dependent on any infrastructure, that is, networks can be formed with decentralized and autonomous manner according to communication demand. However, this characteristic might affect the performance in terms of stability, reliability and so forth. Moreover, ad hoc networks face a scalability problem, which arise when the number of terminals in a network increases or a physical network domain expands, due to the network capacity limitation caused by the decentralized and the autonomous manner. Regarding this problem, some hierarchical and cluster-based routings have been proposed to effectively manage the networks. In this paper, we apply the concept of hierarchical routing and clustering to opportunistic routing, which can forward packets without using any pre-established path to achieve a path diversity gain with greater reachability. The simulation results show that the proposed method can achieve 11% higher reliability with a reasonable end-to-end delay in dense environments and 30% higher in large-scale networks.

This paper explores the feasibility of power analysis attacks against low-latency block ciphers implemented with unrolled architectures capable of encryption/decryption in a single clock cycle. Unrolled architectures have been expected to be somewhat resistant against side-channel attacks compared to typical loop architectures because of no memory (i.e. register) element storing intermediate results in a synchronous manner. In this paper, we present a systematic method for selecting Points-of-Interest for power analysis on unrolled architectures as well as calculating dynamic power consumption at a target function. Then, we apply the proposed method to PRINCE, which is known as one of the most efficient low-latency ciphers, and evaluate its validity with an experiment using a set of unrolled PRINCE processors implemented on an FPGA. Finally, a countermeasure against such analysis is discussed.

An information flow problem is a graph-theoretical formalization of the transportation of information over a complicated network. It is known that a linear network code plays an essential role in a certain type of information flow problems, but it is not understood clearly how contributing linear network codes are for other types of information flow problems. One basic problem concerning this aspect is the linear solvability of information flow problems, which is to decide if there is a linear network code that is a solution to the given information flow problem. Lehman et al. characterize the linear solvability of information flow problems in terms of constraints on the sets of source and sink nodes. As an extension of Lehman's investigation, this study introduces a hierarchy constraint of messages, and discusses the computational complexity of the linear solvability of information flow problems with the hierarchy constraints. Nine classes of problems are newly defined, and classified to one of three categories that were discovered by Lehman et al.

In this paper, we propose a novel placement algorithm for mixed-grained reconfigurable architectures (MGRAs). MGRA consists of coarse-grained and fine-grained clusters, in order to implement a combined digital systems of high-speed data paths with multi-bit operands and random logic circuits for state machines and bit-wise operations. For accelerating simulated annealing based FPGA placement algorithm, range limiter has been proposed to control the distance of two blocks to be interchanged. However, it is not applicable to MGRAs due to the heterogeneous structure of MGRAs. Proposed range limiter using connection bounding box effectively keeps the size of range limiter to encourage moves across fine-grain blocks in non-adjacent clusters. From experimental results, the proposed method achieved 47.8% reduction of cost in the best case compared with conventional methods.

Information-centric networking (ICN) has been positioned for a number of years as a possible replacement to the IP-based Internet architecture with key promises in terms of network efficiency, privacy, security and novel applications. However, such wholesale replacement of the IP-based Internet through a new routing and service infrastructure has always been marred by the difficulties to gain adoption through existing stakeholders and market players, particularly solution providers. In this paper, we provide an evolutionary approach to introducing ICN in the real world by positioning an ICN-based solution as a routing-as-a-service offering for existing IP-based solutions. With this, we enable the expected benefits of ICN for the existing service and application basis of the current Internet. We will outline how we achieve this evolutionary introduction and how existing IP as well as HTTP-based services will be realized. An introduction into our gateway platform will be given, while also outlining first results from a recent showcase deployment.

The time taken for processor simulation can be drastically reduced by selecting simulation points, which are dynamic sections obtained from the simulation result of processors. The overall behavior of the program can be estimated by simulating only these sections. The existing methods to select simulation points, such as SimPoint, used for selecting simulation points are deductive and based on the idea that dynamic sections executing the same static section of the program are of the same phase. However, there are counterexamples for this idea. This paper proposes an inductive method, which selects simulation points from the results obtained by pre-simulating several processors with distinctive microarchitectures, based on assumption that sections in which all the distinctive processors have similar istructions per cycle (IPC) values are of the same phase. We evaluated the first 100G instructions of SPEC 2006 programs. Our method achieved an IPC estimation error of approximately 0.1% by simulating approximately 0.05% of the 100G instructions.

Light-field image processing has been widely employed in many areas, from mobile devices to manufacturing applications. The fundamental process to extract the usable information requires significant computation with high-resolution raw image data. A graphics processing unit (GPU) is used to exploit the data parallelism as in general image processing applications. However, the sparse memory access pattern of the applications reduced the performance of GPU devices for both systematic and algorithmic reasons. Thus, we propose an optimization technique which redesigns the memory access pattern of the applications to alleviate the memory bottleneck of rendering application and to increase the data reusability for depth extraction application. We evaluated our optimized implementations with the state-of-the-art algorithm implementations on several GPUs where all implementations were optimally configured for each specific device. Our proposed optimization increased the performance of rendering application on GTX-780 GPU by 30% and depth extraction application on GTX-780 and GTX-980 GPUs by 82% and 18%, respectively, compared with the original implementations.

The privacy of users' data has become a big issue for cloud service. This research focuses on image cloud database and the function of similarity search. To enhance security for such database, we propose a framework of privacy-enhanced search scheme, while all the images in the database are encrypted, and similarity image search is still supported.

Let G be a graph and K be a set of target vertices of G. Assume that all vertices of G, except the vertices in K, may fail with given probabilities. The K-terminal reliability of G is the probability that all vertices in K are mutually connected. This reliability problem is known to be #P-complete for general graphs. This work develops the first polynomial-time algorithm for computing the K-terminal reliability of circular-arc graphs.

Recently, cloud systems have started to be utilized for services which analyze user's data in the field of computer vision. In these services, keypoints are extracted from images or videos, and the data is identified by machine learning with a large database in the cloud. To reduce the number of keypoints which are sent to the cloud, Keypoints of Interest (KOI) extraction has been proposed. However, since its computational complexity is large, hardware implementation is required for real-time processing. Moreover, the hardware resource must be low because it is embedded in devices of users. This paper proposes a hardware-friendly KOI algorithm with low amount of computations and its real-time hardware implementation based on dual threshold keypoint detection by gradient histogram and parallelization of connectivity of adjacent keypoint-utilizing register counters. The algorithm utilizes dual-histogram based detection and keypoint-matching based calculation of motion information and dense-clustering based keypoint smoothing. The hardware architecture is composed of a detection module utilizing descriptor, and grid-region-parallelization based density clustering. Finally, the evaluation results of hardware implementation show that the implemented hardware achieves Full-HD (1920x1080)-60 fps spatio-temporal keypoint extraction. Further, it is 47 times faster than low complexity keypoint extraction on software and 12 times faster than spatio-temporal keypoint extraction on software, and the hardware resources are almost the same as SIFT hardware implementation, maintaining accuracy.

In this paper, a new scheme for personalized web page recommendation using multi-user search engine query information is proposed. Our contribution is a scheme that improves the accuracy of personalization for various types of contents (e.g., documents, images and music) without increasing user burden. The proposed scheme combines “preference footprints” for browsed pages with collaborative filtering. We acquire user interest using words that are relevant to queries submitted by users, attach all user interests to a page as a footprint when it is browsed, and evaluate the relevance of web pages in relation to words in footprints. The performance of the scheme is evaluated experimentally. The results indicate that the proposed scheme improves the precision and recall of previous schemes by 1%-24% and 80%-107%, respectively.

In this paper, we first analyze the discriminative power in the Best Match (BM) 25 formula and provide its calculation method from the Bayesian point of view. The resulting, derived discriminative power is quite similar to the exponential inverse document frequency (EIDF) that we have previously proposed [1] but retains more preferable theoretical advantages. In our previous paper [1], we proposed the EIDF in the framework of the probabilistic information retrieval (IR) method BM25 to address the instance search task, which is a specific object search for videos using an image query. Although the effectiveness of our EIDF was experimentally demonstrated, we did not consider its theoretical justification and interpretation. We also did not describe the use of region-of-interest (ROI) information, which is supposed to be input to the instance search system together with the original image query showing the instance. Therefore, here, we justify the EIDF by calculating the discriminative power in the BM25 from the Bayesian viewpoint. We also investigate the effect of the ROI information for improving the instance search accuracy and propose two search methods incorporating the ROI effect into the BM25 video ranking function. We validated the proposed methods through a series of experiments using the TREC Video Retrieval Evaluation instance search task dataset.

Various DC power supply systems such as photovoltaic power generation, fuel cell and others have been gradually spreading, so that DC power distribution systems are expected as one of energy-saving technologies at houses and business-related buildings as well as data centers and factories. Under such circumstances switches for electric appliances are requested to interrupt DC current safely in DC power systems (DC 300-400V). It is well-known that DC current is much more difficult to be interrupted than AC current with current-zero. In this paper a model switch is developed and fundamental characteristics of DC current interruption in a resistive circuit is experimentally and theoretically examined. Consequently arc duration is found to be approximately a function of interrupted power rather than source voltage and circuit current. In addition arc length at its extinction is obtained by the observation of a high-speed camera. Then the arc length is found to be decided only by interrupted power like the gap length, independent of separation velocity. From these results it can be made clear that the arc form becomes arc-shaped at its extinction when the interrupted power is larger than about 500W. In addition the effect of magnetic blow-out on arc extinction is examined.

Silver electrical contacts are separated at constant speed and break arcs are generated between them in a 200V-450VDC and 10A resistive circuit. The motion of the break arcs is restricted by some surrounding alumina plates. Transverse magnetic field of a permanent magnet is applied to the break arcs. Changing the supply voltage and the height of a wall located at the upper side of the break arcs, the arc lengthening time and motion of the break arcs are investigated. As a result, the higher supply voltage causes an increase of the arc lengthening time. The arc lengthening time increases significantly when the break arcs expand into the whole of the surrounding walls.

The booming developments in embedded sensor technique, wireless communication technology, and information processing theory contribute to the emergence of Internet of Things (IoT), which aims at perceiving and connecting the physical world. In recent years, a growing number of Internet-connected sensors have published their real-time state about the real-world objects on the Internet, which makes the content-based sensor search a promising service in the Internet of Things (IoT). However, classical search engines focus on searching for static or slowly varying data, rather than object-attached sensors. Besides, the existing sensor search systems fail to support the search mode based on a given measurement range. Furthermore, accessing all available sensors to find sought targets would result in tremendous communication overhead. Thus an accurate matching estimation mechanism is proposed to support the search mode based on a given search range and improve the efficiency and applicability of existing sensor search systems. A time-dependent periodical prediction method is presented to periodically estimate the sensor output, which combines with the during the period feedback prediction method that can fully exploit the verification information for enhancing the prediction precision of sensor reading to efficiently serve the needs of sensor search service. Simulation results demonstrate that our prediction methods can achieve high accuracy and our matching estimation mechanism can dramatically reduce the communication overhead of sensor search system.

Silver contacts are separated at constant speed and break arcs are generated in a 300V-450V DC and 10A resistive circuit. The transverse magnetic field of a permanent magnet is applied to the break arcs. Motion of the break arcs, arc duration and the number of reignitions are investigated when side surfaces of the contacts are covered with insulator pipes. Following results are shown. The motion of the break arcs and the arc duration when the anode is covered with the pipe are the same as those without pipes. When the cathode is covered with the pipe, the motion of break arcs change from that without the pipes and reignitions occur more frequently. The arc duration becomes longer than that without the pipes because of the occurrence of reignitions. The number of reignition increases with increasing the supply voltage in 300V-400V. The period of occurrence of the reignition with pipes is shorter than that when the cathode is covered with the pipe.

Break arcs are rotated with the radial magnetic field formed by a magnet embedded in a fixed cathode contact. The break arcs are generated in a 48VDC resistive circuit. The circuit current when the contacts are closed is 10A. The depth of the magnet varies from 1mm to 4mm to change the strength of the radial magnetic field for rotating break arcs. Images of break arcs are taken by two high-speed cameras from two directions and the rotational motion of the break arcs is observed. The rotational period of rotational motion of the break arcs is investigated. The following results are obtained. The break arcs rotate clockwise on the cathode surface seen from anode side. This rotation direction conforms to the direction of the Lorentz force that affects to the break arcs with the radial magnetic field. The rotational period gradually decreases during break operation. When the depth of magnet is larger, the rotational period becomes longer.

Analyzing the schedulability of hierarchical real-time systems is difficult because of the systems' complex behavior. It gets more complicated when shared resources or dependencies among tasks are included. This paper introduces a framework based on UPPAAL that can analyze the schedulability of hierarchical real-time systems.

In the self-similarity super resolution (SR) approach, similar examples are searched across down-scales in the image pyramid, and the computations of searching similar examples are very heavy. This makes it difficult to work in a real-time way under common software implementation. Therefore, the search process should be further accelerated at an algorithm level. Cauchy-Schwarz inequality has been used previously for fast vector quantization (VQ) encoding. The candidate patches in the search region of SR are analogous to the code-words in the VQ, and Cauchy-Schwarz inequality is exploited to exclude implausible candidate patches early. Consequently, significant acceleration of the similar patch search process is achieved. The proposed method can easily make an optimal trade-off between running speed and visual quality by appropriately configuring the bypass-threshold.

Reconfigurable architectures have emerged as an optimal choice for the hardware realization of digital signal processing (DSP) algorithms. Reconfigurable architecture is either fine-grained or coarse-grained depending on the granularity of reconfiguration used. The flexibility offered by fine-grained devices such as field programmable gate array (FPGA) comes at a significant cost of huge routing area, power consumption and speed overheads. To overcome these issues, several coarse-grained reconfigurable architectures have been proposed. In this paper, a scalable and hybrid dynamically reconfigurable architecture, HyDRA, is proposed for efficient hardware realization of computation intensive DSP algorithms. The proposed architecture is greatly influenced by reported VLSI architectures of a variety of DSP algorithms. It is designed using parameterized VHDL model which allows experimenting with a variety of design features by simply modifying some constants. The proposed architecture with 8×8 processing element array is synthesized using UMC 0.25µm and LF 150nm CMOS technologies respectively. For quantitative evaluation, the architecture is also realized using Xilinx Virtex-7 FPGA. The area and timing results are presented to provide an estimate of each block of the architecture. DSP algorithms such as 32-tap finite impulse response (FIR) filters, 16-point radix-2 single path delay feedback (R2SDF) fast fourier transform (FFT) and R2SDF discrete cosine transform (DCT) are mapped and routed on the proposed architecture.