In this paper, the effects of the TiN encapsulating layer and the dopant segregation process on the interface properties and the Schottky barrier height reduction of PdEr-silicide/n-Si(100) were investigated. The results show that controlling the initial location of the boron dopants by adding the TiN encapsulating layer lowered the Schottky barrier height (SBH) for hole to 0.20 eV. Furthermore, the density of interface states (Dit) on the order of 1011eV-1cm-2 was obtained indicating that the dopant segregation process with TiN encapsulating layer effectively annihilated the interface states.

We investigated the low temperature formation of Pd2Si on Si(100) with TiN encapsulating layer formed at 500°C/1 min. Furthermore, the dopant segregation process was performed with ion dose of 1x1015 cm-2 for B+. The uniform Pd2Si was successfully formed with low sheet resistance of 10.4 Ω/sq. Meanwhile, the PtSi formed on Si(100) showed rough surface morphology if the silicidation temperature was 500°C. The estimated Schottky barrier height to hole of 0.20 eV (qφBp) was realized for n-Si(100).

In this paper, we have investigated the PdEr-silicide formation utilizing a developed PdEr-alloy target for sputtering, and evaluated the contact resistivity of PdEr-silicide layer formed on n-Si(100) by dopant segregation process for the first time. Pd2Si and ErSi2 have same hexagonal structure, while the Schottky barrier height for electron (Φbn) is different as 0.75 eV and 0.28 eV, respectively. A 20 nm-thick PdEr-alloy layer was deposited on the n-Si(100) substrates utilizing a developed PdEr-alloy target by the RF magnetron sputtering at room temperature. Then, 10 nm-thick TiN encapsulating layer was in-situ deposited at room temperature. Next, silicidation was carried out by the RTA at 500 for 5 min in N2/4.9%H2 followed by the selective etching. From the J-V characteristics of fabricated Schottky diode, qΦbn was reduced from 0.75 eV of Pd2Si to 0.43 eV of PdEr-silicide. Furthermore, 4.0x10-8Ωcm2 was extracted for the PdEr-silicide to n-Si(100) by the dopant segregation process.

In this paper, we have investigated the characteristics of PdYb-silicide layer formed by the silicidation of Pd/Yb/n-Si(100) stacked structures for the first time. Pd (12-20 nm)/Yb (0-8 nm) stacked layers were deposited on n-Si(100) substrates by the RF magnetron sputtering at room temperature. Then, 10 nm-thick HfN encapsulating layer was deposited at room temperature. Next, silicidation was carried out by the RTA at 500°C/1 min in N2 followed by the selective etching. From the J-V characteristics of fabricated Schottky diode, Schottky barrier height (SBH) for electron was reduced from 0.73 eV of Pd2Si to 0.4 eV of PdYb-silicide in case the Pd/Yb thicknesses were 14/6 nm, respectively.

We have investigated PtHf silicide formation utilizing a developed PtHf-alloy target to realize low contact resistivity for the first time. A 20 nm-thick PtHf-alloy thin film was deposited on the n-Si(100) by RF magnetron sputtering at room temperature. Then, silicidation was carried out by rapid thermal annealing (RTA) system at 450-600°C/5 min in N2/4.9%H2 ambient. The PtHf-alloy silcide, PtHfSi, layers were successfully formed, and the Schottky barrier height (SBH) for electron of 0.45 eV was obtained by 450°C silicidation. Furthermore, low contact resistivity was achieved for fabricated PtHSi such as 8.4x10-8 Ωcm2 evaluated by cross-bridge Kelvin resistor (CBKR) method.

Formation of thin insulating SiO2 films by anodic oxidation of silicon was studied as a part of investigating an alternative method of fabricating low-cost silicon MIS solar cells. Anodization in the constant-voltage mode was carried out in nonaqueous ethylene glycol solution. The film thickness was carefully measured using an ellipsometer of wavelength 6238 . MIS cell performance was evaluated by comparing the open circuit voltage VOC and the short circuit current density ISC with those of the bare Schottky cell (without anodization) under illumination by a tungsten lamp. It was found that anodization in the constant-voltage mode can increase VOC without reducing ISC, and that anodization in the constant-voltage mode is more controllable and reproducible. The optimun formation voltage which gives the maximum VOC of the MIS cell depends on the forming voltage of oxide. A brief discussion on the mechanism for VOC increase is given.