With the aim of achieving heterogeneous integration of compound semiconductors with silicon technology, the fabrication of an InP/InGaAs transferred-substrate HBT (TS-HBT) on a Si substrate is reported. A current gain of 70 and a maximum current density of 12.3 mA/µm2 were confirmed in a TS-HBT with a 340-nm-wide emitter. From microwave characteristics of the TS-HBT obtained after de-embedding, a cutoff frequency (fT) of 510 GHz and a 26% reduction of the base-collector capacitance were estimated. However, the observed fT was too high for an HBT with a 150-nm-thick collector. This discrepancy can be explained by the error in de-embedding, because an open pad is observed to have large capacitance and strong frequency dependence due to the conductivity of the Si substrate.

In this paper, we report the reduction in the base-collector capacitance (CBC) of InP/InGaAs double heterojunction bipolar transistors with buried SiO2 wires (BG-HBT). In a previous trial, we could not confirm a clear difference between the CBC of the conventional HBT and that of the BG-HBT because the subcollector layer was thicker than expected. In this study, the interface between the collector and the subcollector was shifted to the middle of the SiO2 wires by adjusting the growth temperature, and a reduction in CBC with buried SiO2 wires was confirmed. The estimated CBC of the BG-HBT was 7.6 fF, while that of the conventional HBT was 8.6 fF. This 12% reduction was in agreement with the 10% reduction calculated according to the designed size.

The first realization of a class-F InGaP/GaAs HBT amplifier considering up to 7th-order higher harmonic frequencies, operating at 1.9-GHz band, is described. A total number of open-circuited stubs for higher harmonic frequency treatment is successfully reduced without changing a class-F load circuit condition, using a low-cost and low-loss resin (tan δ=0.0023) circuit board. In class-F amplifier design at microwave frequency ranges, not only increasing treated orders of higher harmonic frequencies for a class-F load circuit, but also decreasing parasitic capacitances of a transistor is important. Influence of a base-collector capacitance, Cbc, for power added efficiency, PAE, and collector efficiency, ηc, was investigated by using a two-dimensional device simulator and a harmonic balance simulator. Measured maximum PAE and ηc reached 74.2% and 76.6%, respectively, using a fabricated class-F InGaP/GaAs HBT amplifier with collector doping density of 21016 cm-3. In case circuit losses were de-embedded for the experimental results, PAE and ηc were estimated as 78.7% and 81.2%, respectively. These are very close to obtainable maximum PAE for the use of the InGaP/GaAs HBT.