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Alexander EDWARD Pak Kwong CHAN
This paper presents analysis and design of a new ultra-low voltage analog front end (AFE) dedicated to strain sensor applications. The AFE, designed in 0.18 µm CMOS process, features a chopper-stabilized instrumentation amplifier (IA), a balanced active MOSFET-C 2nd order low pass filter (LPF), a clock generator and a voltage booster which operate at supply voltage (Vdd) of 0.6 V. The designed IA achieves 30 dB of closed-loop gain, 101 dB of common-mode rejection ratio (CMRR) at 50 Hz, 80 dB of power-supply rejection ratio (PSRR) at 50 Hz, thermal noise floor of 53.4 nV/, current consumption of 14 µA, and noise efficiency factor (NEF) of 9.7. The high CMRR and rail-to-rail output swing capability is attributed to a new low voltage realization of the active-bootstrapped technique using a pseudo-differential gain-boosting operational transconductance amplifier (OTA) and proposed current-driven bulk (CDB) biasing technique. An output capacitor-less low-dropout regulator (LDO), with a new fast start-up LPF technique, is used to regulate this 0.6 V supply from a 0.8–1.0 V energy harvesting power source. It achieves power supply rejection (PSR) of 42 dB at frequency of 1 MHz. A cascode compensated pseudo differential amplifier is used as the filter's building block for low power design. The filter's single-ended-to-balanced converter is implemented using a new low voltage amplifier with two-stage common-mode cancellation. The overall AFE was simulated to have 65.6 dB of signal-to-noise ratio (SNR), total harmonic distortion (THD) of less than 0.9% for a 100 Hz sinusoidal maximum input signal, bandwidth of 2 kHz, and power consumption of 51.2 µW. Spectre RF simulations were performed to validate the design using BSIM3V3 transistor models provided by GLOBALFOUNDRIES 0.18 µm CMOS process.
Takao TSUKUTANI Masami HIGASHIMURA Yasutomo KINUGASA Yasuaki SUMI Yutaka FUKUI
This paper introduces a way to realize high-pass, band-stop and all-pass transfer functions using two-integrator loop structure consisting of loss-less and lossy integrators. The basic circuit configuration is constructed with five Operational Transconductance Amplifiers (OTAs) and two grounded capacitors. It is shown that the circuit can realize their circuit transfer functions by choosing the input terminals, and that the circuit parameters can also be independently set by the transconductance gains with the proportional block. Although the basic circuit configuration has been known, it seems that the feature for realizing the high-pass, the band-stop and the all-pass transfer functions makes the structure more attractive and useful. An example is given together with simulated results by PSPICE.
Fujihiko MATSUMOTO Hiroki WASAKI Yasuaki NOGUCHI
The transfer characteristic of an integrator is affected by excess-phase shift caused by the parasitic capacitance. The phase compensation is obtained by introducing zeros to generate phase lead. This paper proposes a phase compensation technique for the differential signal input integrator. The proposed technique is employing feedforward signal current source. The fifth-order leapfrog Chebyshev low-pass filter with 0.5 dB passband ripple is designed using the integrator with the proposed phase compensation. Further, an autotuning phase compensation system using the proposed technique is realized by applying a PLL system. The effectiveness of the proposed technique is confirmed by PSPICE simulation. The simulation results of the integrator with the proposed phase compensation shows that excess-phase cancellation is obtained at various unity gain frequencies. The accurate filter characteristic of the fifth-order leapfrog filter is obtained by using the autotuning phase compensation system. The passband of the filter is improved over wide range of frequencies. The proposed technique is suitable for low voltage application.
Takao TSUKUTANI Masami HIGASHIMURA Yasuaki SUMI Yutaka FUKUI
This paper introduces current-mode biquad using multiple current output operational transconductance amplifiers (OTAs) and grounded capacitors. The circuit configuration is obtained from a second-order integrator loop structure with loss-less and lossy integrators. The proposed circuit can realize low-pass, band-pass, high-pass, band-stop and all-pass transfer functions by suitably choosing the input and output terminals. And the circuit characteristics can be electronically tuned through adjusting the transconductance gains of OTAs. It is also made clear that the proposed circuit has very low sensitivities with respect to the circuit active and passive elements. An example is given together with simulated results by PSpice.
Cheng-Chung HSU Wu-Shiung FENG
This paper describes how to generate, analyze and design a novel current-mode filter model using tunable multiple-output operational transconductance amplifiers and grounded capacitors (MO-OTA-Cs) for synthesizing both transmission poles and zeros. Transfer functions of low-order, high-order, general type, and special type are realized based on the filter model. The theory focuses mainly on establishing a relationship between the cascaded MO-OTA-Cs and the multiple-loop feedback matrix, which makes the structural generation and design formulas. Adopting the theory allows us to systematically generate many interesting new configurations along with some known structures. All the filter architectures contain only grounded capacitors, which can absorb parasitic capacitances and require smaller chip areas than floating ones. The paper also presents numerical design examples and simulation results to confirm the theoretical analysis.
Moonjae JEONG Satoshi TANAKA Shigetaka TAKAGI Nobuo FUJII Hiroshi KAWAMOTO
This paper presents a 7th-order channel-select filter for a spread-spectrum wireless receiver operating with a minimum power supply of 2.5 V. The channel-select filter implements a sharp transition from 2 MHz to 4 MHz and a stopband attenuation of 50 dB. The 7th-order filter is realized by a cascade of a passive RC integrator, a 3rd-order leapfrog filter, an operational amplifier based differentiator, a 2nd-order notch filter, and a 1st-order allpass filter. It is designed in a 0.35 µm single-poly BiCMOS process. Simulation results show feasibility of the proposed filter.
Fujihiko MATSUMOTO Yasuaki NOGUCHI
Low-voltage technique for IC is getting one of the most important matters. It is quite difficult to realize a filter which can operate at 1 V or less because the base-emitter voltage of transistors can hardly be reduced. A design of a low-voltage continuous-time filter is presented in this paper. The basic building block of the filter is a pseudo-differential transconductor which has no tail current source. Therefore, the operating voltage is lower than that of an emitter-coupled pair. However, the common-mode (CM) gain of the transconductor is quite high and the CMRR is low. In order to reduce the CM gain, a CM feedback circuit is employed. The transconductance characteristic is expressed as the function of hyperbolic cosine. The designed filter is a fifth-order gyrator-C filter. The transconductor and the filter which has a fifth-order Butterworth lowpass characteristic are demonstrated by PSpice simulation. Transconductance characteristic, CMRR and stability of the transconductor are confirmed through the simulation. In the analysis of the filter, frequency response and offset voltage are examined. It is shown that the filter which has corner frequency of the order of megahertz can operate at a 1 V supply voltage.
A design of current-mode continuous-time filters for low voltage and high frequency applications using complementary bipolar current mirror pairs is presented. The proposed current-mode filters consist of simple bipolar current mirrors and capacitors and are quite suitable for monolithic integration. Since the filters are based on the integrator type of realization, the proposed method can be used for a wide range of applications. The frequency of the filters can easily be changed by the DC controlling current. A fifth-order Butterworth and a thirdorder leapfrog filter with tunable cutoff frequencies from 20 MHz to 100 MHz are designed as examples and simulated by SPICE using standard bipolar parameters.