Intelligent traffic monitoring provides information support for autonomous driving, which is widely used in intelligent transportation systems (ITSs). A method for estimating vehicle moving target parameters based on millimeter-wave radars is proposed to solve the problem of low detection accuracy due to velocity ambiguity and Doppler-angle coupling in the process of traffic monitoring. First of all, a MIMO antenna array with overlapping elements is constructed by introducing them into the typical design of MIMO radar array antennas. The motion-induced phase errors are eliminated by the phase difference among the overlapping elements. Then, the position errors among them are corrected through an iterative method, and the angle of multiple targets is estimated. Finally, velocity disambiguation is performed by adopting the error-corrected phase difference among the overlapping elements. An accurate estimation of vehicle moving target angle and velocity is achieved. Through Monte Carlo simulation experiments, the angle error is 0.1° and the velocity error is 0.1m/s. The simulation results show that the method can be used to effectively solve the problems related to velocity ambiguity and Doppler-angle coupling, meanwhile the accuracy of velocity and angle estimation can be improved. An improved algorithm is tested on the vehicle datasets that are gathered in the forward direction of ordinary public scenes of a city. The experimental results further verify the feasibility of the method, which meets the real-time and accuracy requirements of ITSs on vehicle information monitoring.

With the development of spaceborne synthetic aperture radar (SAR), ultra-high spatial resolution has become a hot topic in recent years. The system with high spatial resolution requests large range bandwidths and long azimuth integration time. However, due to the long azimuth integration time, many problems arise, which cannot be ignored in the operational ultra-high resolution spotlight mode. This paper investigates two critical issues that need to be noticed for the full-aperture processing of ultra-high resolution spaceborne SAR spotlight data. The first one is the inaccuracy of the traditional hyperbolic range model (HRM) when the system approaches decimeter range resolution. The second one is the azimuth spectral folding phenomenon. The problems mentioned above result in significant degradation of the focusing effect. Thus, to solve these problems, a full-aperture processing scheme is proposed in this paper which combines the superiorities of two generally utilized processing algorithms: the precision of one-step motion compensation (MOCO) algorithm and the efficiency of modified two-step processing approach (TSA). Firstly, one-step MOCO algorithm, a state-of-the-art MOCO algorithm which has been applied in ultra-high resolution airborne SAR systems, can precisely correct for the error caused by spaceborne curved orbit. Secondly, the modified TSA can avoid the phenomenon of azimuth spectrum folding effectively. The key point of the modified TSA is the deramping approach which is carried out via the convolution operation. The reference function, varying with the instantaneous range frequency, is adopted by the convolution operation for obtaining the unfolding spectrum in azimuth direction. After these operations, the traditional wavenumber domain algorithm is available because the error caused by spaceborne curved orbit and the influence of the spectrum folding in azimuth direction have been totally resolved. Based on this processing scheme, the ultra-high resolution spaceborne SAR spotlight data can be well focused. The performance of the full-aperture processing scheme is demonstrated by point targets simulation.

The extraction of micro-motion parameters is deeply influenced by the precision of estimation on translational motion parameters. Based on the periodicity of micro-motion, the quadratic polynomial fitting is carried out among range delays to align envelope. The micro-motion component of phase information is eliminated by conjugate multiplication after which the translational motion parameters are estimated. Then the translational motion is precisely compensated through the third order polynomial fitting. Results of simulation demonstrate that the algorithm put forward here can realize the precise compensation for translational motion parameters even under an environment with low signal noise ratio (SNR).

We propose a method of interframe prediction in depth map coding that uses pixel-wise 3D motion estimated from encoded textures and depth maps. By using the 3D motion, an approximation of the depth map frame to be encoded is generated and used as a reference frame of block-wise motion compensation.

In this paper, we present a cache based motion compensation (MC) architecture for Quad-HD H.264/AVC video decoder. With the significantly increased throughput requirement, VLSI design for MC is greatly challenged by the huge area cost and power consumption. Moreover, the long memory system latency leads to performance drop of the MC pipeline. To solve these problems, three optimization schemes are proposed in this work. Firstly, a high-performance interpolator based on Horizontal-Vertical Expansion and Luma-Chroma Parallelism (HVE-LCP) is proposed to efficiently increase the processing throughput to at least over 4 times as the previous designs. Secondly, an efficient cache memory organization scheme (4S×4) is adopted to improve the on-chip memory utilization, which contributes to memory area saving of 25% and memory power saving of 3949%. Finally, by employing a Split Task Queue (STQ) architecture, the cache system is capable of tolerating much longer latency of the memory system. Consequently, the cache idle time is saved by 90%, which contributes to reducing the overall processing time by 2440%. When implemented with SMIC 90 nm process, this design costs a logic gate count and on-chip memory of 108.8 k and 3.1 kB respectively. The proposed MC architecture can support real-time processing of 3840×2160@60 fps with less than 166 MHz.

The excessive memory access required to perform motion compensation when decoding compressed video is one of the main limitations in improving the performance of an H.264/AVC decoder. This paper proposes an H.264/AVC decoder that employs three techniques to reduce external memory access events: efficient distribution of reference frame data, on-chip cache memory, and frame memory recompression. The distribution of reference frame data is optimized to reduce the number of row activations during SDRAM access. The novel cache organization is proposed to simplify tag comparisons and ease the access to consecutive 4×4 blocks. A recompression algorithm is modified to improve compression efficiency by using unused storage space in neighboring blocks as well as the correlation with the neighboring pixels stored in the cache. Experimental results show that the three techniques together reduce external memory access time by an average of 90%, which is 16% better than the improvements achieved by previous work. Efficiency of the frame memory recompression algorithm is improved with a 32×32 cache, resulting in a PSNR improvement of 0.371 dB. The H.264/AVC decoder with the three techniques is fabricated and implemented as an ASIC using 0.18 µm technology.

Motion compensation is widely used in many video coding standards. Due to its bandwidth requirement and complexity, motion compensation is one of the most challenging parts in the design of high definition video decoder. In this paper, we propose a high performance and low bandwidth motion compensation design, which supports H.264/AVC, MPEG-1/2 and Chinese AVS standards. We introduce a 2-Dimensional cache that can greatly reduce the external bandwidth requirement. Similarities among the 3 standards are also explored to reduce hardware cost. We also propose a block-pipelining strategy to conceal the long latency of external memory access. Experimental results show that our motion compensation design can reduce the bandwidth by 74% in average and it can real-time decode 1920x1088@30 fps video stream at 80 MHz.

With the development of digital TV system, how to display the NTSC signal in digital TV system is a problem. De-interlacing is an algorithm to solve it. In previous papers, using motion compensation (MC) method for de-interlacing needs lots of computation complexity and it is not easy to implement in hardware. In this paper, a content adaptive de-interlacing algorithm is proposed. Our algorithm is based on the motion adaptive (MA) method which combines the advantages of intra-field and inter-field method. We propose a block type decision mechanism to predict the video content instead of a blind processing with MC method throughout the entire frame. Additionally, in intra-field method, we propose the edge-base adaptive weight average (EAWA) method to achieve a better performance and smooth the edge and stripe. In order to demonstrate our algorithm, we implement the de-interlacing system on the DSP platform with thorough complexity analysis. Compared to MC method, we not only achieve higher video quality in objective and subjective view, but also consume lower computation power. From the profiling on CPU run-time analysis, the proposed algorithm is only one-fifth of MC method. At the DSP demonstration board, the saving ratio is about 54% to 96%.

In this letter, we propose a cache organization that substantially reduces the memory bandwidth of motion compensation (MC) in the H.264/AVC decoders. To reduce duplicated memory accesses to P and B pictures, we employ a four-way set-associative cache in which its index bits are composed of horizontal and vertical address bits of the frame buffer and each line stores an 8 2 pixel data in the reference frames. Moreover, we alleviate the data fragmentation problem by selecting its line size that equals the minimum access size of the DDR SDRAM. The bandwidth of the optimized cache averaged over five QCIF IBBP image sequences requires only 129% of the essential bandwidth of an H.264/AVC MC.

In video compression, the information transmitted from the encoder to the decoder can be classified into two categories: side information, which carries action instructions to be performed, and data such as the residual error of the texture. As video compression technology has matured, better compression has been achieved by increasing the ratio of side information to data, while reducing the overall bit rate. However, there is a limit to this method because the side information becomes a significant fraction of the overall bit rate. In recent video compression technologies, the decoder tends to share the burden of the decision making in order to achieve a higher compression ratio. To further improve the coding efficiency, we tried to provide the decoder with a more active role in reducing the amount of data. According to this approach, by using reconstructed pixels that surround a target block to produce a better sample predictor of the target block, the amount of side information and the residual error of the texture are reduced. Furthermore, multiple candidates of the sample predictor are utilized to create a better sample predictor without increasing the amount of side information. In this paper, we employ a template matching method that makes the decoder more active. The template matching method is applied to the conventional video codec to improve the prediction performance of intra, inter, and bi-directional pictures in video. The results show that improvements in coding efficiency up to 5.8% are achieved.

Existing methods for inverse motion compensation (IMC) in the DCT domain have not considered the unrestricted motion vector (UMV). In the existing methods, IMC is performed to deal with the UMV in the spatial domain after the inverse DCT (IDCT). We propose an IMC method which can deal with the UMV directly in the DCT domain without the use of the IDCT/DCT required by the existing methods. The computational complexity of the proposed method can be reduced by about half of that of the brute-force method operating in the spatial domain. Experimental results show that the proposed method can efficiently reduce the processing time with similar visual quality.

A temporal error concealment algorithm for the block-based video coder has been proposed. The concept of block overlapping is adopted to conceal the erroneous blocks, and the recovered pixels are estimated by the weighted sum from the overlapping. The overlapping weighting matrix has been carefully selected in order to fully exploit the spatial-temporal correlation between boundary blocks and the lost block. Furthermore, the motion vector for the lost block has been recovered by considering the best results for the overlapping. The experimental results are shown by integrating our algorithm into the H.263+ coder.

We propose a novel strategy to obtain a high spatio-temporal resolution video. To this end, we introduce a dual sensor camera that can capture two video sequences with the same field of view simultaneously. These sequences record high resolution with low frame rate and low resolution with high frame rate. This paper presents an algorithm to synthesize a high spatio-temporal resolution video from these two video sequences by using motion compensation and spectral fusion. We confirm that the proposed method improves the resolution and frame rate of the synthesized video.

In this paper, two low power hardware structures essential for MPEG-4 video codec are proposed for portable applications. First, an adaptive bit resolution control (ABRC) scheme is proposed for a processing element (PE) in a systolic-array type motion estimator (ME). By appropriately modifying the datapath of PE to exploit the correlations in pixel values, its structure is optimized in terms of both hardware cost and low power consumption. As a result, power is saved up to 29% compared with a conventional PE while the computation accuracy is preserved and the overhead is kept negligible. Second, a low power motion compensation (MC) accelerator is proposed. By embedding DRAM whose structure is optimized for low power consumption, the power consumption for external data I/Os is dramatically reduced. In addition, distributed nine-tiled block mapping (DNTBM) with partial activation scheme in the frame buffer reduces the power for accessing frame buffer up to 31% compared to a conventional 1-bank tiled mapping. With the proposed MC accelerator, MPEG-4 SP@L1 decoding system is fabricated using 0.18 µm embedded memory logic (EML) technology.

Conventional spatial transform based motion estimation algorithms are not practical because of their heavy computational loads. In this paper, we proposed motion estimation method with variable grid size, which is more efficient than conventional spatial transform based methods and gives better PSNR performance than conventional BMA.

A novel adaptive motion vector quantization algorithm is presented in this letter. The algorithm effectively updates the set of motion vectors using gold-washing technique for block-matching according to the features of input image sequences. Simulation results show that the algorithm has both robust performance and low computational complexity for video coding.

We theoretically evaluate the prediction efficiency of the overlapped block motion compensation (OBMC) compared with the conventional non-overlapped approach. Based on the one-dimensional signal model characterized by the AR(1) process and first-order polynomial motion, a condition under which the performance of the OBMC is better, and an optimum window function are derived. From the results, we discuss and analyze several properties of the OBMC, some of which have been experimentally reported in the literature.

In this paper, we present two fast motion estimation techniques with adaptive variable search range using spatial and temporal correlation of moving pictures respectively. The first technique uses a frame difference between two adjacent frames which is used as a criterion for deciding search window size. The second one uses deviation between the past and the predicted current frame motion vectors which is also used as a criterion for deciding search window size. Simulation results show that these methods reduce the number of checking points while keeping almost the same image quality as that of full search method.

Research in very low-bit rate coding has made significant advancements in the past few years. Most recently, the introduction of the MPEG-4 proposal has motivated a wide variety of a approaches aimed at achieving a new level of video compression. In this paper we review progress in VLBV categorized into 3 main areas. (1) Waveform coding, (2) 2D Content-based coding, and (3) Model-based coding. Where appropriate we also described proposals to the MPEG-4 committee in each of these areas.

This paper presents an overview of research activities in Japan in the field of very low bit-rate video coding. Related research based on the concept of "intelligent image coding" started in the mid-1980's. Although this concept originated from the consideration of a new type of image coding, it can also be applied to other interesting applications such as human interface and psychology. On the other hand, since the beginning of the 1990's, research on the improvement of waveform coding has been actively performed to realize very low bit-rate video coding. Key techniques employed here are improvement of motion compensation and adoption of region segmentation. In addition to the above, we propose new concepts of image coding, which have the potential to open up new aspects of image coding, e.g., ideas of interactive image coding, integrated 3-D visual communication and coding of multimedia information considering mutual relationship amongst various media.