This paper presents a transmit diversity scheme that uses space-time block codes (STBC) in space-spreading code dimensions for time-direction spreading or two-dimensional spreading orthogonal frequency-division multiplexing code-division multiplexing (OFDM-CDM) downlink transmission. The STBC output symbols in two adjacent time slots are spread by two distinctive spreading codes and multiplexed in the same spreading segment. At a receiver, the received subcarrier signals are despread with the two spreading codes in the direction of time, space-time decoded, and then combined in the direction of frequency. Simulation results demonstrated that the proposed scheme provided high tolerance to Doppler spread and outperformed space-time transmit diversity (STTD) for high-mobility users.

In this paper, we propose a fault-tolerance mechanism for microprocessors, which detects transient faults and recovers from them. The investigation of fault-tolerance techniques for microprocessors is driven by two issues: One regards deep submicron fabrication technologies. Future semiconductor technologies could become more susceptible to alpha particles and other cosmic radiation. The other is the increasing popularity of mobile platforms. Cellular telephones are currently used for applications which are critical to our financial security, such as mobile banking, mobile trading, and making airline ticket reservations. Such applications demand that computer systems work correctly. In light of this, we propose a mechanism which is based on an instruction reissue technique for incorrect data speculation recovery and utilizes time redundancy, and evaluate our proposal using a timing simulator.

Space-Time Turbo code is an effective method for the enhancement of link capacity and maximizing the link-budget by balancing the coding gain obtained via Turbo codes and the diversity gain obtained through multiple antenna transmission. A study on an antenna selection scheme for Space-Time Turbo code for OFDM systems is presented in this paper. In the proposed method, the systematic bits and the punctured parity bits are sent from the selected antenna for each sub-carrier, while data transmission is suspended from the antenna experiencing poor channel conditions at the receiver. Simulation results show that the proposed method yields a 2.2 dB gain in the required TxEb/N0 relative to the conventional method, and makes the channel estimation accuracy more robust. Moreover, the proposed method reduces transmission power by about 4 dB compared to the conventional method.

We propose a new dependable system called PREGMA (Platform for Reliable Environment based on a General-purpose Machine Architecture). PREGMA aims to meet two requirements -- fault tolerance and low cost -- for Internet services. It can provide fault tolerance, so we can avoid system failure and prevent data corruption, even if faults occur. That is, it masks the faults by running multiple replicated servers, each possessing its own data, in a loosely synchronized manner and delivering the majority vote as output to clients. Moreover, PREGMA is composed of COTS (Commercial Off-The-Shelf) components without modification, which makes it possible to offer the services at a low cost. We investigated two approaches for achieving redundancy of the Coordinator, which is the core of PREGMA: using the primary backup method and the active replication method. We evaluated the effectiveness of PREGMA in terms of throughput overhead, data integrity and recovery time. The results for a prototype show that PREGMA using the Coordinator with the primary backup method outperforms that with the active replication method and has throughput only 3% lower than a non-redundant system. The results also show that, in the event of failure, the recovery time is only less than one second and no data corruption occurs.

Because most link-state routing protocols, such as OSPF and IS-IS, calculate routes using the Dijkstra algorithm, which poses scalability problems, implementors often introduce an artificial delay to reduce the number of route calculations. Although this delay directly affects IP packet forwarding, it can be acceptable when the network topology does not change often. However, when the topology of a network changes frequently, this delay can lead to a complete loss of IP reachability for the affected network prefixes during the unstable period. In this paper, we propose the Cached Shortest-path Tree (CST) approach, which speeds up intra-domain routing convergence without extra execution of the Dijkstra algorithm, even if the routing for a network is quite unstable. The basic idea of CST is to cache shortest-path trees (SPTs) of network topologies that appear frequently, and use these SPTs to instantly generate a routing table when the topology after a change matches one in the caches. CST depends on a characteristic that we found from an investigation of routing instability conducted on the WIDE Internet in Japan. That is, under unstable routing conditions, both frequently changing Link State Advertisements (LSAs) and their instances tend to be limited. At the end of this paper, we show CST's effectiveness by a trace-driven simulation.

Suppose that we need to design a controller for the system x(t) = A x(t) + B u, u = -K x(t), y(t) = C x(t), where matrices A, B and C are given and K is the matrix to to determine. It is required to determine K so that y(t) should not exceed prescribed value (i.e., the peak of output y(t) is limited). This kind of specification, in general, difficult to satisfy, since the peak ymax of y(t) (we define ymax to be max0 t |y(t)|) is a non-trivial function of design parameter K, which can not be expressed explicitly generally. Therefore, a controller design with such specifications often requires try and error process. In this paper, we approximate ymax in the form of formal power series and give an efficient algorithm to compute the series. We also give a design example of a control system as an application of the algorithm.

Nowadays, the use of dependable systems is generalising, and diagnosis is an important step during their design . A diagnosis in early phases of the design cycle allows to save time and money. Fault injection can be used during the design process of the system, and using Hardware Description Languages, particularly VHDL, it is possible to accomplish this early diagnosis. During last years, the Time-Triggered Architecture (TTA) has emerged as a hard real-time fault-tolerant architecture for embedded systems. This novel architecture is gaining adepts mainly in the avionics and automotive industries ( x-by-wire ). The TTA implements a synchronous protocol with static scheduling that has been specifically targeted at hard real-time fault-tolerant distributed system. In this work, we present the study of the VHDL model of a communication controller based on the TTA, where a number of fault injection campaigns have been carried out. We comment the results produced and suggest some solutions to problems detected.

Using a level oriented model for verification of asynchronous circuits helps users to easily construct formal models with high readability or to naturally model data-path circuits. On the other hand, in order to use such a model for larger circuit, some technique to avoid the state explosion problem is essential. This paper first defines a level oriented formal model based on time Petri nets, and then proposes a partial order reduction algorithm that prunes unnecessary state generation while guaranteeing the correctness of the verification.

The effects of hybrid concatenated space-time (HC-ST) codes applying iterative a posteriori probability (APP) decoding are investigated. The bit error rate (BER) and frame error rate (FER) performance of the iterative decoded hybrid Tarokh, Seshadri, Calderbank space-time (TSC ST) coded system under flat Rayleigh fading is analyzed. At the FER 10-2 level the results show that the serially concatenated space-time (SC-ST) codes provide a coding gain of 3 dB compared to the TSC ST codes, where an additional coding gain of 1 dB beyond the SC-ST code performance can be obtained applying the HC-ST coding topology.

We propose a mathematical model to analyze the performance of TD-CDMA/TDD systems in terms of call blocking probability and then find the optimum time-slot switching-point at the smallest call blocking probability considering asymmetrical traffic load distribution for various kinds of service applications.

This paper is devoted to the modelling of microwave heating applicators using time domain vector finite elements. To reduce the discretisation error due to the dielectric losses of the materials analyzed, first and second order interpolatory and non-interpolatory vector finite element bases are studied. The modes of a resonant applicator used for microwave heating are numerically computed and compared with analytical solutions. The movement of a dielectric load in 45-degree intervals in a multimode applicator is numerically simulated and the results compared experimentally through measuring the return loss using a network analyzer. This paper reveals the relative merits of first and second order bases and shows the effectiveness of finite elements for simulating microwave heating processes.

One conventional technique for source localization is to utilize the time-difference-of-arrival (TDOA) measurements of a signal received at spatially separated sensors. A simple TDOA-based location algorithm that combines the advantages of two efficient positioning methods is developed. It is demonstrated that the proposed approach can give optimum performance in geolocation via satellites at different noise conditions.

A simple non-destructive depth estimation method for a crack on a metal surface has been proposed. This method is based on our finding that the electromagnetic back scattering from a narrow trough (crack model) on the ground plane causes periodical nulls (dips) as the frequency changes, and the first dip occurs when the depth of the crack becomes nearly one half of the incident wavelength. Dependencies of the crack's aperture and the incident angle have also been studied from rigorous and numerical analyses, and considered as our depth estimation parameters. A simple estimation formula for a crack depth has been derived from these studies. Test measurement has been made to check the accuracy of our estimation formula. Time domain gating process is utilized for isolating the crack scattering spectra buried in the measured frequency RCS data. Tested crack types are a narrow rectangular, a tapered, and a stair approximated crack shapes. It is found that the depth of these cracks can be measured within 3 percent error by our estimation method.

The transient phenomenon of electromagnetic waves caused by a time dependent resistive screen in a waveguide is treated. A boundary-value problem is formulated to describe the phenomena, in which the resistivity of the screen varies from one steady state to another in dependence on time. Application of Fourier analysis derives an integral equation, which is approximately solved by the method of least-squares. From the solution of the equation, the transient field is obtained by the inverse Fourier transform. By the use of the incomplete Lipschitz-Hankel integral for the computation of the field, numerical examples showing typical transient phenomenon are attached.

Autonomous distributed manufacturing systems(ADMS) consist of multiple intelligent components with each component acting according to its own judgments. The ADMS objective is to realize more agile and adaptive manufacturing systems. This paper presents the introduction of context-dependent agents (CDAs) in ADMS, and switch strategies depending on system conditions to achieve better performance can be realized by agents that use the same strategies under all system conditions. For the real-time job scheduling problem, the present paper recalls a basic CDA architecture, and presents the results of an extensive empirical evaluation its performance relative to other rule-based schemes based on several common indices for real-time dispatch.

This paper presents measurement and analysis of various networks and applications using a high-speed IP meter. The authors have developed a high-speed IP meter with a GPS timestamp component, which enables precise measurement of packet delay and jitter in various networks. Measurement of the following networks was performed, 1) Measurement of traffic in a commercial IPv6 access service on ADSL, as a typical broadband access service network. 2) Measurement of traffic in the 54th IETF meeting in Yokohama, as a typical high-speed Internet backbone network. This paper reports the characteristics identified in these networks, e.g. asymmetricities of one-way packet delay over an ADSL access network and the difference in TCP/UDP packet delay over a high-speed backbone network. It also presents the analysis results of some multimedia applications in the Internet, and discusses the quality of service on Internet access service networks.

Electromagnetic shielding clothes for reducing human exposure to radio waves have been commercialized. However, their effect has so far been confirmed only in the form of the raw material. In this paper, we develop a new compact scheme for measuring electromagnetic radiations using a short dipole antenna and Gaussian pulses in order to evaluate the effect of the shielding clothes over a wide frequency range with the aid of time-domain measurements and FDTD computation. The proposed method is based on a time-domain analysis technique and pulse compression technique, which enables the user to separate the direct transmission wave from the reflection from the floor as well as from the refracted wave around the neck of the clothes. The direct advantage is that measurements can be made in an ordinary laboratory without the function of an electromagnetic anechoic chamber. Also, we can separate direct transmission wave and diffraction wave from the measurement result by using pulse compression technique, then each frequency characteristic of the shielding shirt can be evaluated. The performance of the separation is confirmed by comparing the measurements with those of a shirt with no opening. We further demonstrate the possibility of predicting the effective conductivity of the material as a function of frequency by comparing the measured results with realistic FDTD computations, which will enable us to design a shielding shirt via numerical means.

Recently, there has been increasing interest in providing high quality and efficient broadband services over wireless and mobile links. Space-time code is designed to exploit multiple-input multiple-output antenna systems and by doing so an enormous increase in the capacity of wireless systems can be achieved. In this letter, a synchronization technique is proposed to improve the performance of multiple-input multiple-output system. The interpolation method is employed to estimate the coarse and fine frequency offset at the same time without additional complexity.

In this paper, a high-performance pipelining architecture for 2-D inverse discrete wavelet transform (IDWT) is proposed. We use a tree-block pipeline-scheduling scheme to increase computation performance and reduce temporary buffers. The scheme divides the input subbands into several wavelet blocks and processes these blocks one by one, so the size of buffers for storing temporal subbands is greatly reduced. After scheduling the data flow, we fold the computations of all wavelet blocks into the same low-pass and high-pass filters to achieve higher hardware utilization and minimize hardware cost, and pipeline these two filters efficiently to reach higher throughput rate. For the computations of N N-sample 2-D IDWT with filter length of size K, our architecture takes at most (2/3)N2 cycles and requires 2N(K-2) registers. In addition, each filter is designed regularly and modularly, so it is easily scalable for different filter lengths and different levels. Because of its small storage, regularity, and high performance, the architecture can be applied to time-critical image decompression.

A high-speed high-resolution sample-and-hold amplifier (SHA) is designed for time-interleaved analog-to-digital converter applications. Using the techniques of precharging and output capacitor coupling can mitigate the stringent performance requirements for the opamp, resulting in low power dissipation. Implemented in a standard 0.25 µm CMOS technology, the SHA achieves 80 dB spurious-free dynamic range (SFDR) for a 1.8 Vpp output at 100 MHz Nyquist sampling rate. The SHA occupies a die area of 0.35 mm2 and dissipates 33 mW from a single 2.5 V supply.