IEICE TRANSACTIONS on Electronics
A Fast fc Automatic Tuning Circuit with Wide Tuning Range for WCDMA Direct Conversion Receiver Systems
Summary :
A fast fc automatic tuning circuit suitable for WCDMA systems is proposed. The circuit employs master-slave architecture using digitally controlled Gm-C filter for avoiding long transient response. The tuning feedback loop contains a 2-bit up-down counter ADC for fast tuning operation. Furthermore, to avoid degradation of fc tuning accuracy due to reference feedthrough, an analog loop filter with notch located near reference frequency is used. The fast fc automatic tuning circuit is fabricated in a SiGe BiCMOS process. The tuning time within 200 µs is achieved for 35 chips from 2 lots and the standard deviation of 25.5 kHz is obtained for the average fc of 2.12 MHz.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E90-C No.6 pp.1247-1252
- Publication Date
- 2007/06/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1093/ietele/e90-c.6.1247
- Type of Manuscript
- Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
- Category
Authors
Keyword
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Osamu WATANABE, Rui ITO, Shigehito SAIGUSA, Tadashi ARAI, Tetsuro ITAKURA, "A Fast fc Automatic Tuning Circuit with Wide Tuning Range for WCDMA Direct Conversion Receiver Systems" in IEICE TRANSACTIONS on Electronics,
vol. E90-C, no. 6, pp. 1247-1252, June 2007, doi: 10.1093/ietele/e90-c.6.1247.
Abstract: A fast fc automatic tuning circuit suitable for WCDMA systems is proposed. The circuit employs master-slave architecture using digitally controlled Gm-C filter for avoiding long transient response. The tuning feedback loop contains a 2-bit up-down counter ADC for fast tuning operation. Furthermore, to avoid degradation of fc tuning accuracy due to reference feedthrough, an analog loop filter with notch located near reference frequency is used. The fast fc automatic tuning circuit is fabricated in a SiGe BiCMOS process. The tuning time within 200 µs is achieved for 35 chips from 2 lots and the standard deviation of 25.5 kHz is obtained for the average fc of 2.12 MHz.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e90-c.6.1247/_p
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@ARTICLE{e90-c_6_1247,
author={Osamu WATANABE, Rui ITO, Shigehito SAIGUSA, Tadashi ARAI, Tetsuro ITAKURA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Fast fc Automatic Tuning Circuit with Wide Tuning Range for WCDMA Direct Conversion Receiver Systems},
year={2007},
volume={E90-C},
number={6},
pages={1247-1252},
abstract={A fast fc automatic tuning circuit suitable for WCDMA systems is proposed. The circuit employs master-slave architecture using digitally controlled Gm-C filter for avoiding long transient response. The tuning feedback loop contains a 2-bit up-down counter ADC for fast tuning operation. Furthermore, to avoid degradation of fc tuning accuracy due to reference feedthrough, an analog loop filter with notch located near reference frequency is used. The fast fc automatic tuning circuit is fabricated in a SiGe BiCMOS process. The tuning time within 200 µs is achieved for 35 chips from 2 lots and the standard deviation of 25.5 kHz is obtained for the average fc of 2.12 MHz.},
keywords={},
doi={10.1093/ietele/e90-c.6.1247},
ISSN={1745-1353},
month={June},}
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TY - JOUR
TI - A Fast fc Automatic Tuning Circuit with Wide Tuning Range for WCDMA Direct Conversion Receiver Systems
T2 - IEICE TRANSACTIONS on Electronics
SP - 1247
EP - 1252
AU - Osamu WATANABE
AU - Rui ITO
AU - Shigehito SAIGUSA
AU - Tadashi ARAI
AU - Tetsuro ITAKURA
PY - 2007
DO - 10.1093/ietele/e90-c.6.1247
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E90-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2007
AB - A fast fc automatic tuning circuit suitable for WCDMA systems is proposed. The circuit employs master-slave architecture using digitally controlled Gm-C filter for avoiding long transient response. The tuning feedback loop contains a 2-bit up-down counter ADC for fast tuning operation. Furthermore, to avoid degradation of fc tuning accuracy due to reference feedthrough, an analog loop filter with notch located near reference frequency is used. The fast fc automatic tuning circuit is fabricated in a SiGe BiCMOS process. The tuning time within 200 µs is achieved for 35 chips from 2 lots and the standard deviation of 25.5 kHz is obtained for the average fc of 2.12 MHz.
ER -
English
