IEICE TRANSACTIONS on Electronics
Circuit-Simulation Model of Cgd Changes in Small-Size MOSFETs Due to High Channel-Field Gradients
Summary :
Small-size MOSFETs are becoming core devices in RF applications because of improved high frequency characteristics. For reliable design of RF integrated circuits operating at the GHz range, accurate modeling of small-size MOSFET characteristics is indispensable. In MOSFETs with reduced gate length (Lg), the lateral field along the MOSFET channel is becoming more pronounced, causing short-channel effects. These effects should be included in the device modeling used for circuit simulation. In this work, we investigated the effects of the field gradient in the gate-drain capacitance (Cgd). 2-Dimensional (2D) simulations done with MEDICI show that the field gradient, as it influences the channel condition, induces a capacitance which is visible in the MOSFET saturation operation. Changes in Cgd is incorporated in the modeling by an induced capacitance approach. The new approach has been successfully implemented in the surface-potential based model HiSIM (Hiroshima-university STARC IGFET Model) and is capable of reproducing accurately the measured Cgd-Lg characteristics, which are particularly significant for pocket-implant technology. Results show that pocket-implantation introduces a steep potential increase near the drain region, which results to a shift of the Cgd transition region (from linear to saturation) to lower bias voltages. Cgd at saturation decreases with Lg due to steeper surface potential and increased impurity concentration effects at reduced Lg.
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- IEICE TRANSACTIONS on Electronics Vol.E86-C No.3 pp.474-480
- Publication Date
- 2003/03/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section INVITED PAPER (Special Issue on the 2002 IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'02))
- Category
Authors
Dondee NAVARRO
Hiroaki KAWANO
Kazuya HISAMITSU
Takatoshi YAMAOKA
Masayasu TANAKA
Hiroaki UENO
Mitiko MIURA-MATTAUSCH
Hans Jurgen MATTAUSCH
Shigetaka KUMASHIRO
Tetsuya YAMAGUCHI
Kyoji YAMASHITA
Noriaki NAKAYAMA
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Dondee NAVARRO, Hiroaki KAWANO, Kazuya HISAMITSU, Takatoshi YAMAOKA, Masayasu TANAKA, Hiroaki UENO, Mitiko MIURA-MATTAUSCH, Hans Jurgen MATTAUSCH, Shigetaka KUMASHIRO, Tetsuya YAMAGUCHI, Kyoji YAMASHITA, Noriaki NAKAYAMA, "Circuit-Simulation Model of Cgd Changes in Small-Size MOSFETs Due to High Channel-Field Gradients" in IEICE TRANSACTIONS on Electronics,
vol. E86-C, no. 3, pp. 474-480, March 2003, doi: .
Abstract: Small-size MOSFETs are becoming core devices in RF applications because of improved high frequency characteristics. For reliable design of RF integrated circuits operating at the GHz range, accurate modeling of small-size MOSFET characteristics is indispensable. In MOSFETs with reduced gate length (Lg), the lateral field along the MOSFET channel is becoming more pronounced, causing short-channel effects. These effects should be included in the device modeling used for circuit simulation. In this work, we investigated the effects of the field gradient in the gate-drain capacitance (Cgd). 2-Dimensional (2D) simulations done with MEDICI show that the field gradient, as it influences the channel condition, induces a capacitance which is visible in the MOSFET saturation operation. Changes in Cgd is incorporated in the modeling by an induced capacitance approach. The new approach has been successfully implemented in the surface-potential based model HiSIM (Hiroshima-university STARC IGFET Model) and is capable of reproducing accurately the measured Cgd-Lg characteristics, which are particularly significant for pocket-implant technology. Results show that pocket-implantation introduces a steep potential increase near the drain region, which results to a shift of the Cgd transition region (from linear to saturation) to lower bias voltages. Cgd at saturation decreases with Lg due to steeper surface potential and increased impurity concentration effects at reduced Lg.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e86-c_3_474/_p
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@ARTICLE{e86-c_3_474,
author={Dondee NAVARRO, Hiroaki KAWANO, Kazuya HISAMITSU, Takatoshi YAMAOKA, Masayasu TANAKA, Hiroaki UENO, Mitiko MIURA-MATTAUSCH, Hans Jurgen MATTAUSCH, Shigetaka KUMASHIRO, Tetsuya YAMAGUCHI, Kyoji YAMASHITA, Noriaki NAKAYAMA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Circuit-Simulation Model of Cgd Changes in Small-Size MOSFETs Due to High Channel-Field Gradients},
year={2003},
volume={E86-C},
number={3},
pages={474-480},
abstract={Small-size MOSFETs are becoming core devices in RF applications because of improved high frequency characteristics. For reliable design of RF integrated circuits operating at the GHz range, accurate modeling of small-size MOSFET characteristics is indispensable. In MOSFETs with reduced gate length (Lg), the lateral field along the MOSFET channel is becoming more pronounced, causing short-channel effects. These effects should be included in the device modeling used for circuit simulation. In this work, we investigated the effects of the field gradient in the gate-drain capacitance (Cgd). 2-Dimensional (2D) simulations done with MEDICI show that the field gradient, as it influences the channel condition, induces a capacitance which is visible in the MOSFET saturation operation. Changes in Cgd is incorporated in the modeling by an induced capacitance approach. The new approach has been successfully implemented in the surface-potential based model HiSIM (Hiroshima-university STARC IGFET Model) and is capable of reproducing accurately the measured Cgd-Lg characteristics, which are particularly significant for pocket-implant technology. Results show that pocket-implantation introduces a steep potential increase near the drain region, which results to a shift of the Cgd transition region (from linear to saturation) to lower bias voltages. Cgd at saturation decreases with Lg due to steeper surface potential and increased impurity concentration effects at reduced Lg.},
keywords={},
doi={},
ISSN={},
month={March},}
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TY - JOUR
TI - Circuit-Simulation Model of Cgd Changes in Small-Size MOSFETs Due to High Channel-Field Gradients
T2 - IEICE TRANSACTIONS on Electronics
SP - 474
EP - 480
AU - Dondee NAVARRO
AU - Hiroaki KAWANO
AU - Kazuya HISAMITSU
AU - Takatoshi YAMAOKA
AU - Masayasu TANAKA
AU - Hiroaki UENO
AU - Mitiko MIURA-MATTAUSCH
AU - Hans Jurgen MATTAUSCH
AU - Shigetaka KUMASHIRO
AU - Tetsuya YAMAGUCHI
AU - Kyoji YAMASHITA
AU - Noriaki NAKAYAMA
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E86-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 2003
AB - Small-size MOSFETs are becoming core devices in RF applications because of improved high frequency characteristics. For reliable design of RF integrated circuits operating at the GHz range, accurate modeling of small-size MOSFET characteristics is indispensable. In MOSFETs with reduced gate length (Lg), the lateral field along the MOSFET channel is becoming more pronounced, causing short-channel effects. These effects should be included in the device modeling used for circuit simulation. In this work, we investigated the effects of the field gradient in the gate-drain capacitance (Cgd). 2-Dimensional (2D) simulations done with MEDICI show that the field gradient, as it influences the channel condition, induces a capacitance which is visible in the MOSFET saturation operation. Changes in Cgd is incorporated in the modeling by an induced capacitance approach. The new approach has been successfully implemented in the surface-potential based model HiSIM (Hiroshima-university STARC IGFET Model) and is capable of reproducing accurately the measured Cgd-Lg characteristics, which are particularly significant for pocket-implant technology. Results show that pocket-implantation introduces a steep potential increase near the drain region, which results to a shift of the Cgd transition region (from linear to saturation) to lower bias voltages. Cgd at saturation decreases with Lg due to steeper surface potential and increased impurity concentration effects at reduced Lg.
ER -
English
