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[Author] Koichi TAKASUGI(3hit)

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  • A 6-ns 4-Mb CMOS SRAM with Offset-Voltage-Insensitive Current Sense Amplifiers

    Koichiro ISHIBASHI  Koichi TAKASUGI  Kunihiro KOMIYAJI  Hiroshi TOYOSHIMA  Toshiaki YAMANAKA  Akira FUKAMI  Naotaka HASHIMOTO  Nagatoshi OHKI  Akihiro SHIMIZU  Takashi HASHIMOTO  Takahiro NAGANO  Takashi NISHIDA  

     
    PAPER

      Vol:
    E78-C No:6
      Page(s):
    728-734

    A 4-Mb CMOS SRAM with 3.84 µm2 TFT load cells is fabricated using 0.25-µm CMOS technology and achieves an address access time of 6 ns at a supply voltage of 2.7 V. The use of a current sense amplifier that is insensitive to its offset voltage enables the fast access time. A boosted cell array architecture allows low voltage operation of fast SRAM's using TFT load cells.

  • Ultra-Low-Latency 8K-Video-Transmission System Utilizing Whitebox Transponder with Disaggregation Configuration

    Yasuhiro MOCHIDA  Daisuke SHIRAI  Koichi TAKASUGI  

     
    PAPER

      Pubricized:
    2022/12/16
      Vol:
    E106-C No:6
      Page(s):
    321-330

    The demand for low-latency transmission of large-capacity video, such as 4K and 8K, is increasing for various applications such as live-broadcast program production, sports viewing, and medical care. In the broadcast industry, low-latency video transmission is required in remote production, an emerging workflow for outside broadcasting. For ideal remote production, long-distance transmission of uncompressed 8K60p video signals, ultra-low latency less than 16.7 ms, and PTP synchronization through network are required; however, no existing video-transmission system fully satisfy these requirements. We focused on optical transport technologies capable of long-distance and large-capacity communication, which were previously used only in telecommunication-carrier networks. To fully utilize optical transport technologies, we propose the first-ever video-transmission system architecture capable of sending and receiving uncompressed 8K video directly through large-capacity optical paths. A transmission timing control in seamless protection switching is also proposed to improve the tolerance to network impairment. As a means of implementation, we focused on whitebox transponder, an emerging type of optical transponder with a disaggregation configuration. The disaggregation configuration enables flexible configuration changes, additional implementations, and cost reduction by separating various functions of optical transponders and controlling them with a standardized interface. We implemented the ultra-low-latency video-transmission system utilizing whitebox transponder Galileo. We developed a hardware plug-in unit for video transmission (VideoPIU), and software to control the VideoPIU. In the video-transmission experiments with 120-km optical fiber, we confirmed that it was capable of transmitting uncompressed 8K60p video stably in 1.3 ms latency and highly accurate PTP synchronization through the optical network, which was required in the ideal remote production. In addition, the application to immersive sports viewing is also presented. Consequently, excellent potential to support the unprecedented applications is demonstrated.

  • A 2.6-ns Wave-Pipelined CMOS SRAM with Dual-Sensing-Latch Circuits

    Suguru TACHIBANA  Hisayuki HIGUCHI  Koichi TAKASUGI  Katsuro SASAKI  Toshiaki YAMANAKA  Yoshinobu NAKAGOME  

     
    PAPER

      Vol:
    E78-C No:6
      Page(s):
    735-738

    The dual-sensing-latch circuit proposed here can solve the synchronization problem of the conventional wave-pipelined SRAM, and the proposed source-biased self-resetting circuit reduces both the cycle and access time of cache SRAM's. A 16-kb SRAM using these circuit techniques was designed, and was fabricated with 0.25-µm CMOS technology. Simulation results indicate that this SRAM has a typical clock access time of 2.6 ns at 2.5-V supply voltage and a worst minimum cycle time of 2.6 ns.