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[Author] Kyeong-Sik MIN(9hit)

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  • A Modified Dickson Charge Pump Circuit with High Efficiency and High Output Voltage

    Duk-Hyung LEE  Daejeong KIM  Ho-Jun SONG  Kyeong-Sik MIN  

     
    LETTER-Electronic Circuits

      Vol:
    E91-C No:2
      Page(s):
    228-231

    A power-efficient Dickson-based charge pump circuit is proposed and verified in this paper. Using a PMOS transfer switch in the new circuit solves the problem of the output voltage loss and its body control switch can suppress the parasitic bipolar action. Comparing this new one with the conventional circuit, the new circuit generates output voltage as high as 2.9 VDD while the conventional one only 2 VDD. For their efficiency values, the new circuit has better efficiency than the conventional one by as much as 14.5% with the area overhead of 12.2% using 3.5-µm and 40-V CMOS high-voltage process.

  • CMOS Charge Pumps Using Cross-Coupled Charge Transfer Switches with Improved Voltage Pumping Gain and Low Gate-Oxide Stress for Low-Voltage Memory Circuits

    Kyeong-Sik MIN  Jin-Hong AHN  

     
    LETTER-Electronic Circuits

      Vol:
    E85-C No:1
      Page(s):
    225-229

    To overcome the problems of the modified Dickson pump like NCP-2, another pump (CCTS-1) where simple voltage doublers are cascaded in series and each of them has cross-coupled configuration is studied in this letter for possible use in low-voltage EEPROMs and DRAMs. Though this concept of cascading doublers has been previously proposed, it is firstly addressed in this letter that CCTS-1 has lower gate-oxide stress, improved voltage pumping gain, and better power efficiency than NCP-2 so that CCTS-1 can be more suitable for multi-stage pump in particular at low VCC. In addition, CCTS-2 is proposed to overcome the degraded body-effect of CCTS-1 without using boosted clocks when the stage number is large.

  • Phase Control of Circular Polarization from a Slot with a Parasitic Dipole

    Kyeong-Sik MIN  Jiro HIROKAWA  Kimio SAKURAI  Makoto ANDO  

     
    PAPER-Antennas and Propagation

      Vol:
    E81-B No:3
      Page(s):
    668-673

    The characteristics of circular polarization from a slot with a parasitic dipole are investigated analytically. It is derived that its phase is linearly dependent upon the angle of the dipole and is independent of that of slot. This interesting behavior is also confirmed by experiments.

  • Fast-Delay and Low-Power Level Shifter for Low-Voltage Applications

    O-Sam KWON  Kyeong-Sik MIN  

     
    LETTER-Electronic Circuits

      Vol:
    E90-C No:7
      Page(s):
    1540-1543

    A new level shifter is proposed in this paper that mitigates the contention problem between its pull-up and pull-down switches without suffering the delay penalty. Comparing this new one with two conventional shifters (CLS-1 and CLS-2) indicates that CLS-1 and CLS-2 have the delay times which are 308% and 26% slower than the proposed shifter when VDDL/VDDH=0.3 and the fan-out=2, respectively. In addition, the comparison of power-delay products shows CLS-2 consumes 28.5% more energy than the proposed shifter. For the layout area, the proposed shifter needs only 15% more than CLS-2. By comparing the propagation delay times, the power-delay products, and the area overhead, the proposed shifter is considered very suitable to future Very Deep Sub-Micron (VDSM) technologies with low-voltage applications.

  • Row-by-Row Dynamic Source-Line Voltage Control (RRDSV) Scheme for Two Orders of Magnitude Leakage Current Reduction of Sub-1-V-VDD SRAM's

    Kyeong-Sik MIN  Kouichi KANDA  Hiroshi KAWAGUCHI  Kenichi INAGAKI  Fayez Robert SALIBA  Hoon-Dae CHOI  Hyun-Young CHOI  Daejeong KIM  Dong Myong KIM  Takayasu SAKURAI  

     
    PAPER-Electronic Circuits

      Vol:
    E88-C No:4
      Page(s):
    760-767

    A new Row-by-Row Dynamic Source-Line Voltage Control (RRDSV) scheme is proposed to suppress leakage current by two orders of magnitude in the SRAM's for sub-70 nm process technology with sub-1-V VDD. This two-order leakage reduction is caused from the cooperation of reverse body-to-source biasing and Drain Induced Barrier Lowering (DIBL) effects. In addition, metal shields are proposed to be inserted between the cell nodes and the bit lines not to allow the cell nodes to be flipped by the external bit-line coupling noise in this paper. A test chip has been fabricated to verify the effectiveness of the RRDSV scheme with the metal shields by using 0.18-µm CMOS process. The retention voltages of SRAM's with the metal shields are measured to be improved by as much as 40-60 mV without losing the stored data compared to the SRAM's without the shields.

  • An Approach for Numerical Analysis of Differential Equation-Based Feeding Point Modeling of Electromagnetic Devices

    Kyeong-Sik MIN  Manh-Dat VU  

     
    PAPER-Antennas and Propagation

      Vol:
    E90-B No:5
      Page(s):
    1208-1213

    In this paper, a method of feeding point analysis is proposed for microstrip antenna that is based on the probe current compensation (PCC) method and the overlapping-grid technique (OGT) in FDTD. Generally, in the Maxwell and Ampere's differential curl equation-based FDTD, calculated error occurs in computation of the feeding point current. By applying the PCC method, the current of the feeding point can be compensated. This paper also analyzes the proposed feeding point model with cylindrical shape. When feeding point model is analyzed by rectangular coordinate, contour path error occurs. Therefore, the OGT is proposed to solve the contour path error. In the OGT, the cylindrical coordinate is applied for modeling of feeding point. In the case of using the PCC method and the OGT, the calculated error and contour path error are reduced and improved.

  • A Single-Layer Linear-to-Circular Polarization Converter for a Narrow-Wall Slotted Waveguide Array

    Kyeong-Sik MIN  Jiro HIROKAWA  Kimio SAKURAI  Makoto ANDO  Naohisa GOTO  Yasuhiko HARA  

     
    PAPER-Antennas and Propagation

      Vol:
    E80-B No:8
      Page(s):
    1264-1272

    This paper describes the characteristics of a one dimensional narrow-wall slotted waveguide array with a single-layer linear-to-circular polarization converter consisting of a dipole array. An external boundary value problem of one slot and three dipoles, which approximates the mutual coupling between the dipole array and an edge slot extending over three faces of a rectangular waveguide, is formulated and analyzed by the method of moments; design of polarization conversion is conducted for this model as a unit element. If every unit element has perfect circular polarization, grating lobes appear in the array pattern due to the alternating slot angle: these are suppressed in this paper by changing the dipole angle and degrading the axial ratio of the unit element. The validity of the design is confirmed by the measurements. The dipole array has negligible effects upon slot impedance; the polarization conversion for existing narrow-wall slotted arrays is realized by add-on dipole array.

  • History of Antenna Technology for Mobile Communications in Korea Open Access

    Kyeong-Sik MIN  Chul-Keun PARK  Suk-Youb KANG  

     
    INVITED SURVEY PAPER

      Vol:
    E91-B No:7
      Page(s):
    2179-2186

    In this paper, we discuss the development of wireless and mobile communications in Korea, current technological trends, and the future outlook on technological developments. Since the introduction of the telegraph and the telephone in September 1885, Korea's wired and wireless communications industry has consistently developed for over 100 years. Since 1984, upon the provision of the mobile telecommunications service, the industry has seen drastic qualitative and quantitative growth in terms of both technical and economic aspects, which played a crucial role in the rapid growth of the digital industry in Korea. After the era of the analog cellular service based on the Advanced Mobile Phone System (AMPS), a precursor to the modern mobile service, Korea became the world's first country to commercialize Code Division Multiple Access (CDMA) in 1996 and succeeded in commercializing CDMA 2000 1x (IMT-2000) in 2001. With further developments in the mobile communication technology, the technology for antennas also saw drastic advancements. As the mobile antennas moved from the second to the third generation, they grew from external models to very small internal models. At the same time, they evolved into highly functional and high performance multiple band and wide band antennas. Furthermore, Korea was the first country to commercialize and offer the Wireless Broadband Internet (WiBro) service in 2006. By leading the wireless communications standardization and exerting remarkable efforts in research and development, Korea is consolidating its status as an Information Technology (IT) leader in the global market. The antenna's inherent importance will be further emphasized in the near future as it satisfies the performance and structural needs of portable terminals necessary for realizing the projected establishment of the ubiquitous world. It is thought that antenna technologies will not be limited to simple concepts as previously experienced but will utilize various kinds of materials that build the terminals' structure and framework. Moreover, studies will be performed with an emphasis on multiple band, multiple directivity, and ultra-wide band. Accordingly, antenna technologies to which new concepts are applied, such as SMART antenna and MIMO antenna technologies and meta-materials, will surely be effective alternatives.

  • Efficient and Large-Current-Output Boosted Voltage Generators with Non-Overlapping-Clock-Driven Auxiliary Pumps for Sub-1-V Memory Applications

    Kyeong-Sik MIN  Young-Hee KIM  Daejeong KIM  Dong Myeong KIM  Jin-Hong AHN  Jin-Yong CHUNG  

     
    LETTER-Electronic Circuits

      Vol:
    E87-C No:7
      Page(s):
    1208-1213

    A new CMOS positive charge pump (NCP-1) is proposed and compared with the conventional pump in this paper. The comparison indicates that this NCP-1 scheme delivers 1.6 times larger output current into the load with roughly 10% area penalty than the conventional pump. To alleviate the area overhead of NCP-1, another new NCP-2 is proposed, where its current drivability is slightly lower than NCP-1 by as small as 5% but it achieves much smaller layout penalty as small as 2-3% compared with the conventional pump. The effectiveness of NCP-1 is verified experimentally in this paper by using 0.35-µm n-well process technology. These NCP-1 and NCP-2 are useful to DRAMs and NOR-type flash memories with sub-1-V VDD, where their large-output-current nature is favorable.