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[Author] Shunji KIMURA(3hit)

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  • A 10-Gb/s Burst-Mode Clock-and-Data Recovery IC with Frequency-Adjusting Dual Gated VCOs

    Yusuke OHTOMO  Masafumi NOGAWA  Kazuyoshi NISHIMURA  Shunji KIMURA  Tomoaki YOSHIDA  Tomoaki KAWAMURA  Minoru TOGASHI  Kiyomi KUMOZAKI  

     
    PAPER

      Vol:
    E91-C No:6
      Page(s):
    903-910

    A high-speed serial, 10-Gb/s, passive optical network (PON) is a good candidate for a future PON system. However, there are several issues to be solved in extending the physical speed to 10 Gb/s. The issues focused on here are not only the data rate, which is eight times higher than that of a conventional GE-PON, but also the instantaneous amplification and synchronization of AC-coupling burst-input data without a reset signal. An input amplifier with data-edge detection can both detect level-varying input due to AC-coupling and respond to the first bit of a burst packet. Another issue discussed here is tolerance to long consecutive identical digits (CIDs). A burst-mode clock-and-data recovery (CDR) using dual gated VCOs (G-VCOs) is designed for 10-Gb/s operation. The relation between the frequency difference of the dual G-VCOs and CID tolerance is derived with a frequency tunable G-VCO circuit. The burst-mode CDR IC is implemented in a 0.13-µm CMOS process. It successfully operates at a data rate of 10.3125 Gb/s. The CDR IC using the edge-detection input amplifier and the G-VCO CDR core achieves amplification and synchronization in 0.2 ns with AC-coupling without a reset signal. The IC also demonstrates 1001 bits of CID tolerance, which is more than enough tolerance for 65-bit CIDs in the 64B/66B code of 10 Gigabit Ethernet. Measured data suggest that dual G-VCOs on a die have over a 20-MHz frequency difference and that the frequency adjusting between the G-VCOs is effective for increasing CID tolerance.

  • Ultra Fast Response AC-Coupled Burst-Mode Receiver with High Sensitivity and Wide Dynamic Range for 10G-EPON System Open Access

    Kazutaka HARA  Shunji KIMURA  Hirotaka NAKAMURA  Naoto YOSHIMOTO  Hisaya HADAMA  

     
    INVITED PAPER

      Vol:
    E94-B No:7
      Page(s):
    1845-1852

    A 10-Gbit/s-class ac-coupled average-detection-type burst-mode receiver (B-Rx) with an ultra fast response and a high tolerance to the long consecutive identical digits has been developed. Key features of the circuit design are the baseline-wander common-mode rejection technique and the inverted distortion technique adopted in the limiting amplifier to cope with both the fast response and the high tolerance. Our B-Rx with newly developed limiting amplifier IC achieved a settling time of less than 150 ns, a sensitivity of -29.8 dBm, and a dynamic range of 23.8 dB with a 231-1 pseudo random bit sequences. Moreover, we also describe several potential B-Rx applications. We achieved better performance by applying the proposed systems to our B-Rx.

  • 70-Gbit/s Multiplexer and 50-Gbit/s Decision IC Modules Using InAlAs/InGaAs/InP HEMTs

    Koichi MURATA  Taiichi OTSUJI  Eiichi SANO  Shunji KIMURA  Yasuro YAMANE  

     
    LETTER-Integrated Electronics

      Vol:
    E83-C No:7
      Page(s):
    1166-1169

    The authors report ultra-high-speed digital IC modules that use 0.1-µm InAlAs/InGaAs/InP HEMTs for broadband optical fiber communication systems. The multiplexer IC module operated at up to 70 Gbit/s, and error-free operation of the decision IC module was confirmed at 50 Gbit/s. The speed of each module is the fastest yet reported for its kind.