Katsuya OHISHI Takashi HISAKADO Tohlu MATSUSHIMA Osami WADA
This paper describes the equivalent-circuit model of a metamaterial composed of conducting spheres and wires. This model involves electromagnetic coupling between the conductors, with retardation. The lumped-parameter equivalent circuit, which imports retardation to the electromagnetic coupling, is developed in this paper from Maxwell's equation. Using the equivalent-circuit model, we clarify the relationship between the retardation and radiation loss; we theoretically demonstrate that the electromagnetic retardation in the near-field represents the radiation loss of the meta-atom in the far-field. Furthermore, this paper focuses on the retarded electromagnetic coupling between two meta-atoms; we estimate the changes in the resonant frequencies and the losses due to the distance between the two coupled meta-atoms. It is established that the dependence characteristics are significantly affected by electromagnetic retardation.
Shuenn-Yuh LEE Cheng-Pin WANG Chuan-Yu SUN Po-Hao CHENG Yuan-Sun CHU
This study proposes a multiple-output differential-input operational transconductance amplifier-C (MODI OTA-C) filter with an impedance scaler to detect cardiac activity. A ladder-type fifth-orderButterworth low-pass filter with a large time constant and low noise is implemented to reduce coefficient sensitivity and address signal distortion. Moreover, linearized MODI OTA structures with reduced transconductance and impedance scaler circuits for noise reduction are used to achieve a wide dynamic range (DR). The OTA-based circuit is operated in the subthreshold region at a supply voltage of 1 V to reduce the power consumption of the wearable device in long-term use. Experimental results of the filter with a bandwidth of 250 Hz reveal that DR is 57.6 dB, and the harmonic distortion components are below -59 dB. The power consumption of the filter, which is fabricated through a TSMC 0.18 µm CMOS process, is lower than 390 nW, and the active area is 0.135 mm2.
Youming ZHANG Kaiye BAO Xusheng TANG Fengyi HUANG Nan JIANG
This paper describes a broadband low phase noise VCO implemented in 0.13 µm CMOS process. A 1-bit switched varactor and a 4-bit capacitor array are adopted in cooperation with the automatic frequency calibration (AFC) circuit to lower the VCO tuning gain (KVCO), with a measured AFC time of 6 µs. Several noise reduction techniques are exploited to minimize the phase noise of the VCO. Measurement results show the VCO generates a high frequency range from 11.37 GHz to 14.8 GHz with a KVCO of less than 270 MHz/V. The prototype exhibits a phase noise of -114.6 dBc/Hz @ 1 MHz at 14.67 GHz carrier frequency and draws 10.5 mA current from a 1.2 V supply. The achieved figure-of-merits (FoM=-186.9dBc/Hz, FoMT=-195.3dBc/Hz) favorably compares with the state-of-the-art.
Satoshi KAWAKAMI Takatsugu ONO Toshiyuki OHTSUKA Koji INOUE
We propose a parallel precomputation method for real-time model predictive control. The key idea is to use predicted input values produced by model predictive control to solve an optimal control problem in advance. It is well known that control systems are not suitable for multi- or many-core processors because feedback-loop control systems are inherently based on sequential operations. However, since the proposed method does not rely on conventional thread-/data-level parallelism, it can be easily applied to such control systems without changing the algorithm in applications. A practical evaluation using three real-world model predictive control system simulation programs demonstrates drastic performance improvement without degrading control quality offered by the proposed method.
Yusuke SUZUKI Hiroshi YAMADA Shinpei KATO Kenji KONO
Graphics processing units (GPUs) have become an attractive platform for general-purpose computing (GPGPU) in various domains. Making GPUs a time-multiplexing resource is a key to consolidating GPGPU applications (apps) in multi-tenant cloud platforms. However, advanced GPGPU apps pose a new challenge for consolidation. Such highly functional GPGPU apps, referred to as GPU eaters, can easily monopolize a shared GPU and starve collocated GPGPU apps. This paper presents GLoop, which is a software runtime that enables us to consolidate GPGPU apps including GPU eaters. GLoop offers an event-driven programming model, which allows GLoop-based apps to inherit the GPU eaters' high functionality while proportionally scheduling them on a shared GPU in an isolated manner. We implemented a prototype of GLoop and ported eight GPU eaters on it. The experimental results demonstrate that our prototype successfully schedules the consolidated GPGPU apps on the basis of its scheduling policy and isolates resources among them.
In a multiprocessor system, processors are connected based on various types of network topologies. A network topology is usually represented by a graph. Let G be a graph and u, v be any two distinct vertices of G. We say that G is pancyclic if G has a cycle C of every length l(C) satisfying 3≤l(C)≤|V(G)|, where |V(G)| denotes the total number of vertices in G. Moreover, G is panpositionably pancyclic from r if for any integer m satisfying $r leq m leq rac{|V(G)|}{2}$, G has a cycle C containing u and v such that dC(u,v)=m and 2m≤l(C)≤|V(G)|, where dC(u,v) denotes the distance of u and v in C. In this paper, we investigate the panpositionable pancyclicity problem with respect to the n-dimensional locally twisted cube LTQn, which is a popular topology derived from the hypercube. Let D(LTQn) denote the diameter of LTQn. We show that for n≥4 and for any integer m satisfying $D(LTQ_n) + 2 leq m leq rac{|V(LTQ_n)|}{2}$, there exists a cycle C of LTQn such that dC(u,v)=m, where (i) 2m+1≤l(C)≤|V(LTQn)| if m=D(LTQn)+2 and n is odd, and (ii) 2m≤l(C)≤|V(LTQn)| otherwise. This improves on the recent result that u and v can be positioned with a given distance on C only under the condition that l(C)=|V(LTQn)|. In parallel and distributed computing, if cycles of different lengths can be embedded, we can adjust the number of simulated processors and increase the flexibility of demand. This paper demonstrates that in LTQn, the cycle embedding containing any two distinct vertices with a feasible distance is extremely flexible.
Kernel updates are a part of daily life in contemporary computer systems. They usually require an OS reboot that involves restarting not only the kernel but also all of the running applications, causing downtime that can disrupt software services. This downtime issue has been tackled by numerous approaches. Although dynamic translation of the running kernel image, which is a representative approach, can conduct kernel updates at runtime, its applicability is inherently limited. This paper describes Dwarf, which shortens downtime during kernel updates and covers more types of updates. Dwarf launches the newer kernel in the background on the same physical machine and forces the kernel to inherit the running states of the older kernel. We implemented a prototype of Dwarf on Xen 4.5.2, Linux 2.6.39, Linux 3.18.35, and Linux 4.1.6. Also, we conducted experiments using six applications, such as Apache, MySQL, and memcached, and the results demonstrate that Dwarf's downtime is 1.8 seconds in the shortest case and up to 10× shorter than that of the normal OS reboot.
Shyue-Ming TANG Yue-Li WANG Chien-Yi LI Jou-Ming CHANG
Generalized recursive circulant graphs (GRCGs for short) are a generalization of recursive circulant graphs and provide a new type of topology for interconnection networks. A graph of n vertices is said to be s-pancyclic for some $3leqslant sleqslant n$ if it contains cycles of every length t for $sleqslant tleqslant n$. The pancyclicity of recursive circulant graphs was investigated by Araki and Shibata (Inf. Process. Lett. vol.81, no.4, pp.187-190, 2002). In this paper, we are concerned with the s-pancyclicity of GRCGs.
Datacenter growth in traffic and scale is driving innovations in constructing tightly-coupled facilities with low-latency communication for different specific applications. A famous custom design is rackscale (RS) computing by gathering key server resource components into different resource pools. Such a resource-pooling implementation requires a new software stack to manage resource discovery, resource allocation and data communication. The reconfiguration of interconnection networks on their components is potentially needed to support the above demand in RS. In this context as an evolution of the original RS architecture the inter-rackscale (IRS) architecture, which disaggregates hardware components into different racks according to their own areas, has been proposed. The heart of IRS is to use a limited number of free-space optics (FSO) channels for wireless connections between different resource racks, via which selected pairs of racks can communicate directly and thus resource-pooling requirements are met without additional software management. In this study we evaluate the influences of FSO links on IRS networks. Evaluation results show that FSO links reduce average communication hop count for user jobs, which is close to the best possible value of 2 hops and thus provides comparable benchmark performance to that of the counterpart RS architecture. In addition, if four FSO terminals per rack are allowed, the CPU/SSD (GPU) interconnection latency is reduced by 25.99% over Fat-tree and by 67.14% over 2-D Torus. We also present the advantage of an FSO-equipped IRS system in average turnaround time of dispatched jobs for given sets of benchmark workloads.
Seira HIDANO Takao MURAKAMI Shuichi KATSUMATA Shinsaku KIYOMOTO Goichiro HANAOKA
The number of IT services that use machine learning (ML) algorithms are continuously and rapidly growing, while many of them are used in practice to make some type of predictions from personal data. Not surprisingly, due to this sudden boom in ML, the way personal data are handled in ML systems are starting to raise serious privacy concerns that were previously unconsidered. Recently, Fredrikson et al. [USENIX 2014] [CCS 2015] proposed a novel attack against ML systems called the model inversion attack that aims to infer sensitive attribute values of a target user. In their work, for the model inversion attack to be successful, the adversary is required to obtain two types of information concerning the target user prior to the attack: the output value (i.e., prediction) of the ML system and all of the non-sensitive values used to learn the output. Therefore, although the attack does raise new privacy concerns, since the adversary is required to know all of the non-sensitive values in advance, it is not completely clear how much risk is incurred by the attack. In particular, even though the users may regard these values as non-sensitive, it may be difficult for the adversary to obtain all of the non-sensitive attribute values prior to the attack, hence making the attack invalid. The goal of this paper is to quantify the risk of model inversion attacks in the case when non-sensitive attributes of a target user are not available to the adversary. To this end, we first propose a general model inversion (GMI) framework, which models the amount of auxiliary information available to the adversary. Our framework captures the model inversion attack of Fredrikson et al. as a special case, while also capturing model inversion attacks that infer sensitive attributes without the knowledge of non-sensitive attributes. For the latter attack, we provide a general methodology on how we can infer sensitive attributes of a target user without knowledge of non-sensitive attributes. At a high level, we use the data poisoning paradigm in a conceptually novel way and inject malicious data into the ML system in order to modify the internal ML model being used into a target ML model; a special type of ML model which allows one to perform model inversion attacks without the knowledge of non-sensitive attributes. Finally, following our general methodology, we cast ML systems that internally use linear regression models into our GMI framework and propose a concrete algorithm for model inversion attacks that does not require knowledge of the non-sensitive attributes. We show the effectiveness of our model inversion attack through experimental evaluation using two real data sets.
Thoa NGUYEN Nguyen Hai DANG Nguyen MINH Nam Pham NGOC Hung T. LE Truong Cong THANG
Video streaming over HTTP/2 is a new trend in multimedia delivery. Compared to the pull-based HTTP/1.1 protocol, the new HTTP/2 protocol's Server Push feature is very effective in reducing the overheads (e.g., in terms of energy, processing, bandwidth) for clients, servers, and network nodes. This paper presents an HTTP/2 push-based adaptation method for on-demand video streaming that reduces the number of requests and provides high video quality. In our method, for each client request, the server sends video segments continuously until it receives another client request with a new quality. Since a request is sent only if the client wants to update the video bitrate, our method can significantly reduce the request related overhead. For this context, a buffer based algorithm is proposed to provide high and smooth video quality while avoiding buffer underflows. Experiments show that the proposed method can provide a lower number of requests, higher average quality and better quality smoothness than existing methods.
Jinli RAO Tianyong AO Shu XU Kui DAI Xuecheng ZOU
Data integrity is a key metric of security for Internet of Things (IoT) which refers to accuracy and reliability of data during transmission, storage and retrieval. Cryptographic hash functions are common means used for data integrity verification. Newly announced SHA-3 is the next generation hash function standard to replace existing SHA-1 and SHA-2 standards for better security. However, its underlying Keccak algorithm is computation intensive and thus limits its deployment on IoT systems which are normally equipped with 32-bit resource constrained embedded processors. This paper proposes two efficient SHA-3 ASIPs based on an open 32-bit RISC-V embedded processor named Z-scale. The first operation-oriented ASIP (OASIP) focuses on accelerating time-consuming operations with instruction set extensions to improve resource efficiency. And next datapath-oriented ASIP (DASIP) targets exploiting advance data and instruction level parallelism with extended auxiliary registers and customized datapath to achieve high performance. Implementation results show that both proposed ASIPs can effectively accelerate SHA-3 algorithm with 14.6% and 26.9% code size reductions, 30% and 87% resource efficiency improvements, 71% and 262% better maximum throughputs as well as 40% and 288% better power efficiencies than reference design. This work makes SHA-3 algorithm integration practical for both low-cost and high-performance IoT systems.
Aditia Nur BAKTI No-Weon KANG Jae-Yong KWON
Reverberation chambers (RCs) are used widely in the electromagnetic measurement area. An RC is designed to have a long reverberation time, generate numerous modes, and provide good field uniformity within the chamber. The purpose of this paper is to describe the design process and measurement of the KRISS Reverberation Chamber (KRC). KRC models with 4.5m × 3.4m × 2.8m dimensions are simulated by 3D numerical simulation software. The field uniformity and correlation coefficient are then analyzed at 200MHz to obtain the optimized model. The simulation results show good performance in terms of field uniformity and are confirmed by measurement from 200MHz to 1GHz. The lowest usable frequency (LUF) of KRC was confirmed by field uniformity to be 200MHz. However, the stirrer correlation coefficient results show good performance above 300MHz.
By exploiting the inherent sparsity of wireless channels, the channel estimation in an orthogonal frequency division multiplexing (OFDM) system can be cast as a compressed sensing (CS) problem to estimate the channel more accurately. Practically, matching pursuit algorithms such as orthogonal matching pursuit (OMP) are used, where path delays of the channel is guessed based on correlation values for every quantized delay with residual. This full search approach requires a predefined grid of delays with high resolution, which induces the high computational complexity because correlation values with residual at a huge number of grid points should be calculated. Meanwhile, the correlation values with high resolution can be obtained by interpolation between the correlation values at a low resolution grid. Also, the interpolation can be implemented with a low pass filter (LPF). By using this fact, in this paper we substantially reduce the computational complexity to calculate the correlation values in channel estimation using CS.
Peng GAO Yipeng MA Chao LI Ke SONG Yan ZHANG Fei WANG Liyi XIAO
Most state-of-the-art discriminative tracking approaches are based on either template appearance models or statistical appearance models. Despite template appearance models have shown excellent performance, they perform poorly when the target appearance changes rapidly. In contrast, statistic appearance models are insensitive to fast target state changes, but they yield inferior tracking results in challenging scenarios such as illumination variations and background clutters. In this paper, we propose an adaptive object tracking approach with complementary models based on template and statistical appearance models. Both of these models are unified via our novel combination strategy. In addition, we introduce an efficient update scheme to improve the performance of our approach. Experimental results demonstrate that our approach achieves superior performance at speeds that far exceed the frame-rate requirement on recent tracking benchmarks.
Daiki ITO Kenta NOMURA Masaki KAMIZONO Yoshiaki SHIRAISHI Yasuhiro TAKANO Masami MOHRI Masakatu MORII
Cyber attacks targeting specific victims use multiple intrusion routes and various attack methods. In order to combat such diversified cyber attacks, Threat Intelligence is attracting attention. Attack activities, vulnerability information and other threat information are gathered, analyzed and organized in threat intelligence and it enables organizations to understand their risks. Integrated analysis of the threat information is needed to compose the threat intelligence. Threat information can be found in incident reports published by security vendors. However, it is difficult to analyze and compare their reports because they are described in various formats defined by each vendor. Therefore, in this paper, we apply a modeling framework for analyzing and deriving the relevance of the reports from the views of similarity and relation between the models. This paper presents the procedures of modeling incident information described in the reports. Moreover, as case studies, we apply the modeling method to some actual incident reports and compare their models.
In this letter, we consider several optimization problems associated with the configuration of grouping-based framed slotted ALOHA protocols. Closed-form formulas for determining the optimal values of system parameters such as the process termination time and confidence levels for partitioned groups are presented. Further, we address the maximum group size required for meaningful grouping gain and the effectiveness of the grouping technique in light of signaling overhead.
Daisuke INOUE Tomomi MIYAKE Mitsuhiro SUGIMOTO
We propose a novel mechanism of short-term image-sticking phenomenon in in-plane switching liquid crystal displays (IPS LCDs) that is related to ionic relaxation generated by a vertical electric field caused by a flexoelectric effect. We discuss the differences between electric fields caused by the flexoelectric effect and those caused by DC bias voltage.
Takashi MAEHATA Suguru KAMEDA Noriharu SUEMATSU
The 1-bit digital radio frequency (DRF) transmitter using a band-pass delta-sigma modulator (BP-DSM) can output a radio frequency (RF) signal carrying a binary data stream with a constant data rate regardless of the carrier frequency, which makes it possible to transmit RF signals over digital optical links with a constant bit rate. However, the optical link requires a line coding, such as 8B10B or 64B66B, to constrain runlength and disparity, and the line coding corrupts the DRF power spectrum owing to additional or encoded data. This paper proposes a new line coding for BP-DSM, which is able to control the runlength and the disparity of the 1-bit data stream by adding a notch filter to the BP-DSM that suppresses the low frequency components. The notch filter stimulates the data change and balances the direct current (DC) components. It is demonstrated that the proposed line coding shortens the runlength from 50 bits to less than 8 bits and reduces the disparity from several thousand bits to 5 bits when the 1-bit DRF transmitter outputs an LTE signal with 5 MHz bandwidth, when using carrier frequencies from 0.5GHz to 2GHz and an output power variation of 60dB.
Sirous TALEBI Ehsan ADIB Majid DELSHAD
This paper presents a high step-up DC-DC converter for low voltage sources such as solar cells, fuel cells and battery banks. A novel non isolated Zero-Voltage Switching (ZVS) interleaved DC-DC boost converter condition is introduced. In this converter, by using coupled inductor and active clamp circuit, the stored energy in leakage inductor is recycled. Furthermore, ZVS turn on condition for both main and clamp switches are provided. The active clamp circuit suppresses voltage spikes across the main switch and the voltage of clamp capacitor leads to higher voltage gain. In the proposed converter, by applying interleaved technique, input current ripple and also conduction losses are decreased. Also, with simple and effective method without applying any additional element, the input ripple due to couple inductors and active clamp circuit is cancelled to achieve a smooth low ripple input current. In addition, the applied technique in this paper leads to increasing the life cycle of circuit components which makes the proposed converter suitable for high power applications. Finally an experimental prototype of the presented converter with 40 V input voltage, 400 V output voltage and 200 W output power is implemented which verifies the theoretical analysis.