This paper presents the design and experimental evaluation of 60GHz small cell radio access based on IEEE 802.11ad/WiGig. The access point (AP) prototype used combines three RF modules with beamforming technology to provide 360° area coverage. In order to compensate for limited communication distance, multiple APs are employed to achieve wide area coverage. A handover algorithm suitable for IEEE 802.11ad/WiGig is employed to achieve flexible control of the cell coverage of each AP. As a proof of concept, a prototype system is set up at Narita International Airport and the capability of multiuser Gb/s wireless access is successfully demonstrated. In addition, the system behavior under stringent conditions is evaluated by load testing and throughput degradation due to co-channel and inter-channel interference is investigated.

This paper presents a wideband digital predistortion (DPD) architecture suitable for wideband wireless systems, such as IEEE 802.11ad/WiGig, where low oversampling ratio of the digital-to-analog converter (DAC) is a bottleneck for available linearization bandwidth. In order to overcome the bandwidth limitation in the conventional DPD, the proposed DPD introduces a complex coefficient filter in the DPD signal processing, which enables it to achieve asymmetric linearization. This approach effectively suppresses one side of adjacent channel leakages with twice the bandwidth as compared to the conventional DPD. The concept is verified through system simulation and measurements. Using a scaled model of a 2 GHz RF carrier frequency, the measurement shows a 4.2 dB advantage over the conventional DPD in terms of adjacent channel leakage.

This paper presents a 60 GHz analog/digital beamforming receiver that effectively suppresses interference signals, targeting the IEEE 802.11ad/WiGig standard. Combining two-stream analog frontends with interference rejection digital signal processing, the analog beamforming steers the antenna beam to the desired direction while the digital beamforming provides gain suppression in the interference direction. A prototype has been built with 40 nm CMOS analog frontends as well as offline baseband digital signal processing. Measurements show a 3.1 dB EVM advantage over conventional two-stream diversity during a packet collision situation.

The 60GHz millimeter-wave (mmWave) wireless technology is a focus of increasing attention, since its ability to transmit more than Gbps PHY data rate makes it suitable for high-speed, short-range applications such as peer-to-peer synchronization and kiosk terminals. In the case of short-range communication with a range of several tens of centimeters, only terminals present in this communication range will be affect and communication is considered to be on a one-to-one basis. In one-to-one communication, a simpler and more efficient access mechanism is preferable. The ability of current CSMA/CA based MAC, for example MAC of IEEE 802.11 WLAN systems, to achieve high throughput is limited by the low MAC efficiency caused by high signal exchange overhead, such as interframe space (IFS) and acknowledgement. This paper proposes an ACK/NACK mechanism that enhances the throughput in short-range one-to-one communication. The ACK/NACK mechanism uses Negative ACK (NACK) as the acknowledgement policy to reduce the overhead of ACK and the transmitter switches the required acknowledgement policy to ACK based on a switchover threshold. It solves a problem arising from NACK, namely, that NACK has no mechanism for keeping alive. We evaluate the throughput of the ACK/NACK mechanism by both theoretical analysis and computer simulation. The proposed ACK/NACK mechanism is implemented in 65 nm CMOS process (BBIC); we connect this BBIC to a 60 GHz RFIC and exchange frames wirelessly. In this experiment, it is verified that the ACK/NACK mechanism enhances throughput.

A 60 GHz direct conversion transceiver which employs amplitude/phase imbalance cancellation technique is newly proposed. By using the proposed technique, the receive path of the transceiver achieves less than 0.2 dB of amplitude error and less than 3 of phase error at 60 GHz bands over a 10 GHz bandwidth, which relaxes the design accuracy required for baluns used in the transceiver. It also employs a simple and fast calibration algorithm to adjust the locking range of the divide-by-3 injection locked divider in the phase locked loop. Fabricated in 90 nm CMOS technology, the transceiver achieves a low power consumption of 230 mW in transmit mode and 173 mW in receive mode. The output spectrum of 1.76 Gsps π/2-BPSK/QPSK modulation shows the excellent distortion and spurious suppression that meet the IEEE802.11ad draft standard.

At mm-wave frequency, the layout of CMOS transistors has a larger effect on the device performance than ever before in low frequency. In this work, the distance between the gate and drain contact (Dgd) has been enlarged to obtain a better maximum available gain (MAG). By using the asymmetric-layout transistor, a 0.6 dB MAG improvement is realized when Dgd changes from 60 nm to 200 nm. A four-stage common-source low noise amplifier is implemented in a 65 nm CMOS process. A measured peak power gain of 24 dB is achieved with a power dissipation of 30 mW from a 1.2-V power supply. An 18 dB variable gain is also realized by adjusting the bias voltage. The measured 3-dB bandwidth is about 17 GHz from 51 GHz to 68 GHz, and noise figure (NF) is from 4.0 dB to 7.6 dB.

The noise performance of common source and cascode topology 60 GHz LNAs is analyzed and verified. The analysis result shows that the noise performance of the cascode topology is degraded at high frequency due to the inter-stage node capacitance. The analysis result is verified by experimental results. A three-stage LNA employing two noise-matched CS stages and a cascode stage is proposed. For comparison a conventional two-stage cascode LNA is also been studied with the measurement-based model. The measured results of the proposed LNA show that an input and output matching of less than -10 dB, a maximum gain of 9.7 dB and a noise figure (NF) of 3.2 dB are obtained with a power consumption of 30 mW from a 1.2-V supply voltage. Compared to the conventional cascode LNA, an improvement of 2.3-dB for NF and 1.9-dB for power gain are realized. Both the proposed and conventional LNAs are implemented in 65 nm CMOS process.

An L-2L through-line de-embedding method has been verified up to millimeter wave frequency. The parasitics of the pad can be modeled from the L-2L through-line. Measurement results of the transmission lines and transistors can be de-embedded by subtracting the parasitic matrix of the pad. Therefore, the de-embedding patterns, which is used for modeling active and passive devices, decrease greatly and the chip area also decreases. A one-stage amplifier is firstly implemented for helping verifying the de-embedding results. After that a four-stage 60 GHz amplifier has been fabricated in CMOS 65 nm process. Experimental results show that the four-stage amplifier realizes an input matching better than -10.5 dB and an output matching better than -13 dB at 61 GHz. A small signal power gain of 16.4 dB and a 1 dB output compression point of 4.6 dBm are obtained with a DC current consumption of 128 mA from a 1.2 V power supply. The chip size is 1.5 mm 0.85 mm.

This paper highlights seven years of research at the Berkeley Wireless Research Center (BWRC) related to mm-wave electronics. Active and passive device design and layout, circuit approaches, and system architecture for short range mm-wave communication links will be discussed. The design of several key building blocks in a receiver front-end will be highlighted.

Using an electro-absorption duplexer (EAD) we presented a transceiver (TRx) module for dual function of both electrical-to-optical (E/O) and optical-to-electrical (E/O) conversion at 60 GHz band. The EAD chip was fabricated by monolithically integrating both a waveguide photodiode (PD) and an electro-absorption modulator (EAM) in association with traveling wave electrodes. We also investigated the issues of RF packaging in which the optoelectronic and electronic amplifier devices were co-packaged in a single housing. The RF impedance matching was accomplished in assistance with a microstrip bandpass filter.

A vertically connected wireless link (VCWL) using the 60-GHz band has been proposed for reliable and economical transmission of various satellite media to individual building units. This paper describes a prototype of such a VCWL that employs a self-heterodyne scheme. The CNR performance of the prototype was evaluated in a real environment. The results showed that signals transmissions of the required quality could be delivered to the units of a five-story apartment. For the placement of multiple transmitters in close proximity, the prototype required 12 dB of CIR.