We consider the intrinsic randomness problem for correlated sources. Specifically, there are three correlated sources, and we want to extract two mutually independent random numbers by using two separate mappings, where each mapping converts one of the output sequences from two correlated sources into a random number. In addition, we assume that the obtained pair of random numbers is also independent of the output sequence from the third source. We first show the δ-achievable rate region where a rate pair of two mappings must satisfy in order to obtain the approximation error within δ ∈ [0,1), and the second-order achievable rate region for correlated general sources. Then, we apply our results to non-mixed and mixed independently and identically distributed (i.i.d.) correlated sources, and reveal that the second-order achievable rate region for these sources can be represented in terms of the sum of normal distributions.

The effect of the hidden terminal (HT) over multi-hop cascaded wireless networks with the omni-directional full-duplex relays will cause data collision. We allocate the frequency band among different hops in an orthogonal way based on link grouping strategy to avoid this HT problem. In order to maximize the achievable rate, an optimal frequency allocation scheme is proposed by boundary alignment. Performance analyses are provided and further validated by the simulation results.

As financial products have grown in complexity and level of risk compounding in recent years, investors have come to find it difficult to assess investment risk. Furthermore, companies managing mutual funds are increasingly expected to perform risk control and thus prevent assumption of unforeseen risk by investors. A related revision to the investment fund legal system in Japan led to establishing what is known as “the rule for investment diversification” in December 2014, without a clear discussion of its expected effects on market price formation having taken place. In this paper, we therefore used an artificial market to investigate its effects on price formation in financial markets where investors follow the rule at the time of a market crash that is caused by the collapse of an asset fundamental price. As results, we found the possibility that when the fundamental price of one asset collapses and its market price also collapses, some asset market prices also fall, whereas other asset market prices rise for a market in which investors follow the rule for investment diversification.

Malaysia is one of the countries with the highest car crash fatality rates in Asia. The high implementation cost of in-vehicle driver behavior warning system and autonomous driving remains a significant challenge. Motivated by the large number of simple yet effective inventions that benefitted many developing countries, this study presents the findings of emotion recognition based on skin conductance response using a low-cost wearable sensor. Emotions were evoked by presenting the proposed display stimulus and driving stimulator. Meaningful power spectral density was extracted from the filtered signal. Experimental protocols and frameworks were established to reduce the complexity of the emotion elicitation process. The proof of concept in this work demonstrated the high accuracy of two-class and multiclass emotion classification results. Significant differences of features were identified using statistical analysis. This work is one of the most easy-to-use protocols and frameworks, but has high potential to be used as biomarker in intelligent automobile, which helps prevent accidents and saves lives through its simplicity.

In this paper, a multichannel speech enhancement system which adopts a denoising auto-encoder as part of the beamformer is proposed. The proposed structure of the generalized sidelobe canceller generates enhanced multi-channel signals, instead of merely one channel, to which the following denoising auto-encoder can be applied. Because the beamformer exploits spatial information and compensates for differences in the transfer functions of each channel, the proposed system is expected to resolve the difficulty of modelling relative transfer functions consisting of complex numbers which are hard to model with a denoising auto-encoder. As a result, the modelling capability of the denoising auto-encoder can concentrate on removing the artefacts caused by the beamformer. Unlike conventional beamformers, which combine these artefacts into one channel, they remain separated for each channel in the proposed method. As a result, the denoising auto-encoder can remove the artefacts by referring to other channels. Experimental results prove that the proposed structure is effective for the six-channel data in CHiME, as indicated by improvements in terms of speech enhancement and word error rate in automatic speech recognition.

In this paper, the Voronoi region of the transmitted codeword is employed to improve the sphere bound on the maximum-likelihood decoding (MLD) performance of binary linear block codes over additive white Gaussian noise (AWGN) channels. We obtain the improved sphere bounds both on the frame-error probability and the bit-error probability. With the framework of the sphere bound proposed by Kasami et al., we derive the conditional decoding error probability on the spheres by defining a subset of the Voronoi region of the transmitted codeword, since the Voronoi regions of a binary linear block code govern the decoding error probability analysis over AWGN channels. The proposed bound improves the sphere bound by Kasami et al. and the sphere bound by Herzberg and Poltyrev. The computational complexity of the proposed bound is similar to that of the sphere bound by Kasami et al.

This paper proposes a novel wavelet de-noising scheme regarding the existing burst noises that consist of background and impulsive noises in power-line communications. The proposed de-noising scheme employs multi-level threshold functions to efficiently and adaptively reduce the given burst noises. The experiment results show that the proposed de-noising scheme significantly outperformed the conventional schemes.

Three-dimensional integrated circuits (3D ICs) that employ through-silicon vias (TSVs) integrating multiple dies vertically have opened up the potential of highly improved circuit designs. However, various types of TSV defects may occur during the assembly process, especially the clustered TSV faults because of the winding level of thinned wafer, the surface roughness and cleanness of silicon dies,inducing TSV yield reduction greatly. To tackle this fault clustering problem, router-based and ring-based TSV redundancy architectures were previously proposed. However, these schemes either require too much area overhead or have limited reparability to tolerant clustered TSV faults. Furthermore, the repairing lengths of these schemes are too long to be ignored, leading to additional delay overhead, which may cause timing violation. In this paper, we propose a region-based TSV redundancy design to achieve relatively high reparability as well as low additional delay overhead. Simulation results show that for a given number of TSVs (8*8) and TSV failure rate (1%), our design achieves 11.27% and 20.79% reduction of delay overhead as compared with router-based design and ring-based scheme, respectively. In addition, the reparability of our proposed scheme is much better than ring-based design by 30.84%, while it is close to that of the router-based scheme. More importantly, the overall TSV yield of our design achieves 99.88%, which is slightly higher than that of both router-based method (99.53%) and ring-based design (99.00%).

Hotspots occur frequently in 3D multi-core processors (3D-MCPs), and they may adversely impact both the reliability and lifetime of a system. We present a new thermally constrained task scheduler based on a thermal-pattern-aware voltage assignment (TPAVA) to reduce hotspots in and optimize the performance of 3D-MCPs. By analyzing temperature profiles of different voltage assignments, TPAVA pre-emptively assigns different initial operating-voltage levels to cores for reducing temperature increase in 3D-MCPs. The proposed task scheduler consists of an on-line allocation strategy and a new voltage-scaling strategy. In particular, the proposed on-line allocation strategy uses the temperature-variation rates of the cores and takes into two important thermal behaviors of 3D-MCPs that can effectively minimize occurrences of hotspots in both thermally homogeneous and heterogeneous 3D-MCPs. Furthermore, a new vertical-grouping voltage scaling (VGVS) strategy that considers thermal correlation in 3D-MCPs is used to handle thermal emergencies. Experimental results indicate that, when compared to a previous online thermally constrained task scheduler, the proposed task scheduler can reduce hotspot occurrences by approximately 66% (71%) and improve throughput by approximately 8% (2%) in thermally homogeneous (heterogeneous) 3D-MCPs. These results indicate that the proposed task scheduler is an effective technique for suppressing hotspot occurrences and optimizing throughput for 3D-MCPs subject to thermal constraints.

The extraction of micro-motion parameters is deeply influenced by the precision of estimation on translational motion parameters. Based on the periodicity of micro-motion, the quadratic polynomial fitting is carried out among range delays to align envelope. The micro-motion component of phase information is eliminated by conjugate multiplication after which the translational motion parameters are estimated. Then the translational motion is precisely compensated through the third order polynomial fitting. Results of simulation demonstrate that the algorithm put forward here can realize the precise compensation for translational motion parameters even under an environment with low signal noise ratio (SNR).

Sponsored search is a mechanism that shows the appropriate advertisements (ads) according to search queries. The orders and payments of ads are determined by the auction. However, the externalities which give effects to CTR and haven't been considered in some existing works because the mechanism with externalities has high computational cost. In addition, some algorithms which can calculate the approximated solution considering the externalities within the polynomial-time are proposed, however, it assumed that one bidder can propose only a single ad. In this paper, we propose the approximation allocation algorithm that one bidder can offer many ads considering externalities. The proposed algorithm employs the concept of the combinatorial auction in order to consider the combinational bids. In addition, the proposed algorithm can find the approximated allocation by the dynamic programming. Moreover, we prove the computational complexity and the monotonicity of the proposed mechanism, and demonstrate computational costs and efficiency ratios by changing the number of ads, slots and maximum bids. The experimental results show that the proposed algorithm can calculate 0.7-approximation solution even though the full search can't find solutions in the limited times.

In this paper, we treat (k, L, n) ramp secret sharing schemes (SSSs) that can detect impersonation attacks and/or substitution attacks. First, we derive lower bounds on the sizes of the shares and random number used in encoding for given correlation levels, which are measured by the mutual information of shares. We also derive lower bounds on the success probabilities of attacks for given correlation levels and given sizes of shares. Next we propose a strong (k, L, n) ramp SSS against substitution attacks. As far as we know, the proposed scheme is the first strong (k, L, n) ramp SSSs that can detect substitution attacks of at most k-1 shares. Our scheme can be applied to a secret SL uniformly distributed over GF(pm)L, where p is a prime number with p≥L+2. We show that for a certain type of correlation levels, the proposed scheme can achieve the lower bounds on the sizes of the shares and random number, and can reduce the success probability of substitution attacks within nearly L times the lower bound when the number of forged shares is less than k. We also evaluate the success probability of impersonation attack for our schemes. In addition, we give some examples of insecure ramp SSSs to clarify why each component of our scheme is essential to realize the required security.

A new type of spatially coupled low density parity check (SCLDPC) code is proposed. This code has two benefits. (1) This code requires less number of iterations to correct the erasures occurring through the binary erasure channel in the waterfall region than that of the usual SCLDPC code. (2) This code has lower error floor than that of the usual SCLDPC code. Proposed code is constructed as a coupled chain of the underlying LDPC codes whose code lengths exponentially increase as the position where the codes exist is close to the middle of the chain. We call our code spatially “Mt. Fuji” coupled LDPC (SFCLDPC) code because the shape of the graph representing the code lengths of underlying LDPC codes at each position looks like Mt. Fuji. By this structure, when the proposed SFCLDPC code and the original SCLDPC code are constructed with the same code rate and the same code length, L (the number of the underlying LDPC codes) of the proposed SFCLDPC code becomes smaller and M (the code lengths of the underlying LDPC codes) of the proposed SFCLDPC code becomes larger than those of the SCLDPC code. These properties of L and M enables the above reduction of the number of iterations and the bit error rate in the error floor region, which are confirmed by the density evolution and computer simulations.

In this study, we consider techniques to search for high-rate punctured convolutional code (PCC) encoders by rearranging row vectors of identical-encoder generator matrices. One well-known method to obtain a good PCC encoder is to perform an exhaustive search of all candidates. However, this approach is time-intensive. An exhaustive search with a rate RG=1/2 original encoder requires a relatively short time, whereas that with an RG=1/3 or lower original encoder takes significantly longer. The encoders with lower-rate original encoders are expected to create better PCC encoders. Thus, this paper proposes a method that uses exhaustive search results with rate RG=1/2 original encoders, and rearranges row vectors of identical-encoder generator matrices to create PCCs with a lower rate original code. Further, we provide PCC encoders obtained by searches that utilize our method.

A pseudorandom number generator is widely used in cryptography. A cryptographic pseudorandom number generator is required to generate pseudorandom numbers which have good statistical properties as well as unpredictability. An m-sequence is a linear feedback shift register sequence with maximal period over a finite field. M-sequences have good statistical properties, however we must nonlinearize m-sequences for cryptographic purposes. A geometric sequence is a binary sequence given by applying a nonlinear feedforward function to an m-sequence. Nogami, Tada and Uehara proposed a geometric sequence whose nonlinear feedforward function is given by the Legendre symbol. They showed the geometric sequences have good properties for the period, periodic autocorrelation and linear complexity. However, the geometric sequences do not have the balance property. In this paper, we introduce geometric sequences of two types and show some properties of interleaved sequences of the geometric sequences of two types. These interleaved sequences have the balance property and double the period of the geometric sequences by the interleaved structure. Moreover, we show correlation properties and linear complexity of the interleaved sequences. A key of our observation is that the second type geometric sequence is the complement of the left shift of the first type geometric sequence by half-period positions.

Scaling supply voltage (VDD) and threshold voltage (Vth) dynamically has a strong impact on energy efficiency of CMOS LSI circuits. Techniques for optimizing VDD and Vth simultaneously under dynamic workloads are thus widely investigated over the past 15 years. In this paper, we refer to the optimum pair of VDD and Vth, which minimizes the energy consumption of a circuit under a specific performance constraint, as a minimum energy point (MEP). Based on the simple transregional models of a CMOS circuit, this paper derives a simple necessary and sufficient condition for the MEP operation. The simple condition helps find the MEP of CMOS circuits. Measurement results using standard-cell based memories (SCMs) fabricated in a 65-nm process technology also validate the condition derived in this paper.

In this paper, a weighted multiple bit flipping (WMBF) algorithman for decoding low-density parity-check (LDPC) codes is proposed first. Then the improved WMBF algorithm which we call the efficient weighted bit-flipping (EWBF) algorithm is developed. The EWBF algorithm can dynamically choose either multiple bit-flipping or single bit-flipping in each iteration according to the log-likelihood ratio of the error probability of the received bits. Thus, it can efficiently increase the convergence speed of decoding and prevent the decoding process from falling into loop traps. Compared with the parallel weighted bit-flipping (PWBF) algorithm, the EWBF algorithm can achieve significantly lower computational complexity without performance degradation when the Euclidean geometry (EG)-LDPC codes are decoded. Furthermore, the flipping criterion does not require any parameter adjustment.

In an IoT system, neural networks have the potential to perform advanced information processing in various environments. To clarify this, the robustness of a restricted Boltzmann machine (RBM) used for deep neural networks, such as a deep belief network (DBN), was studied in this paper. Even if memory or logic errors occurred in the circuit operating in the RBM while pre-training the DBN, they did not affect the identification rate of the DBN, showing the robustness of the RBM. In addition, robustness against soft errors was evaluated. The soft errors had almost no influence on the RBM unless they were as large as 1012 times or more in the 50-nm CMOS process.

Coordinated checkpointing is a widely-used checkpoint/restart protocol for fault-tolerance in large-scale HPC systems. However, this protocol will involve massive amounts of I/O concentration, resulting in considerably high checkpoint overhead and high energy consumption. This paper focuses on speculative checkpointing, a CPR mechanism that allows for temporal distribution of checkpointings to avoid I/O concentration. We propose execution time and energy models for speculative checkpointing, and investigate energy-performance characteristics when speculative checkpointing is adopted in exascale systems. Using these models, we study the benefit of speculative checkpointing over coordinated checkpointing under various realistic scenarios for exascale HPC systems. We show that, compared to coordinated checkpointing, speculative checkpointing can achieve up to a 11% energy reduction at the cost of a relatively-small increase in the execution time. In addition, a significant energy-performance trade-off is expected when the system scale exceeds 1.2 million nodes.

In data centers, large numbers of computers are run simultaneously. These computers consume an enormous amount of energy. Several challenges related to this issue have been published. An energy-efficient storage management method that cooperates with applications was one effective approach. In this method, data and storage devices are managed using application support and the power consumption of storage devices is significantly decreased. However, existing studies do not take the virtualized environment into account. Recently, many data-intensive applications have been run in a virtualized environment, such as the cloud computing environment. In this paper, we focus on a virtualized environment wherein multiple virtual machines run on a physical computer and a data intensive application runs on each virtual machine. We discuss a method for reducing storage device power consumption using application support. First, we propose two storage management methods using application information. One method optimizes the inter-HDD file layout. This method removes frequently-accessed files from a certain HDD and switches the HDD to power-off mode. To balance loads and reduce seek distances, this method separates a heavily accessed file and consolidates files in a virtual machine with low access frequency. The other method optimizes the intra-HDD file layout, in addition to performing inter-HDD optimization. This method places frequently accessed files near each other. Second, we present our experimental results and demonstrate that the proposed methods can create sufficiently long HDD access intervals that power-off mode can be used, and thereby, reduce the power consumption of storage devices.