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[Keyword] EMP(607hit)

581-600hit(607hit)

  • Adaptive Array Antenna Based on Spatial Spectral Estimation Using Maximum Entropy Method

    Minami NAGATSUKA  Naoto ISHII  Ryuji KOHNO  Hideki IMAI  

     
    PAPER

      Vol:
    E77-B No:5
      Page(s):
    624-633

    An adaptive array antenna can be considered as a useful tool of combating with fading in mobile communications. We can directly obtain the optimal weight coefficients without updating in temporal sampling, if the arrival angles and signal-to-noise ratio (SNR) of the desired and the undesired signals can be accurately estimated. The Maximum Entropy Method (MEM) can estimate the arrival angles, and the SNR from spatially sampled signals by an array antenna more precisely than the Discrete Fourier Transform (DFT). Therefore, this paper proposes and investigates an adaptive array antenna based on spatial spectral estimation using MEM. We call it MEM array. In order to reduce complexity for implementation, we also propose a modified algorithm using temporal updating as well. Furthermore, we propose a method of both improving estimation accuracy and reducing the number of antenna elements. In the method, the arrival angles can be approximately estimated by using temporal sampling instead of spatial sampling. Computer simulations evaluate MEM array in comparison with DFT array and LMS array, and show improvement owing to its modified algorithm and performance of the improved method.

  • Temperature Adaptive Voltage Reference Network for Realizing a Transconductance with Low Temperature Sensitivity

    Rabin RAUT  

     
    LETTER-Integrated Electronics

      Vol:
    E77-C No:3
      Page(s):
    515-518

    A technique to realize a transconductance which is relatively insensitive over temperature variations is reported. Simulation results with MOS and bipolar transistors indicate substantial improvement in temperature insensitivity over a range exceeding 100 degrees Celsius. It should find useful applications in analog LSI/VLSI systems operating over a wide range of temperature.

  • Japanese Sentence Generation Grammar Based on the Pragmatic Constraints

    Kyoko KAI  Yuko DEN  Yasuharu DEN  Mika OBA  Jun-ichi NAKAMURA  Sho YOSHIDA  

     
    PAPER

      Vol:
    E77-D No:2
      Page(s):
    181-191

    Naturalness of expressions reflects various pragmatic factors in addition to grammatical factors. In this paper, we discuss relations between expressions and two pragmatic factors: a point fo view of speaker and a hierarchical relation among participants. Degree of empathy" and class" is used to express these pragmatic factors as one-dimensional notion. Then inequalities and equalities of them become conditions for selecting natural expressions. The authors of this paper formulate conditions as principles about lexical and syntactical constraints, and have implemented a sentence generation grammar using the unification grammar formalism.

  • Low Temperature Coefficient CMOS Voltage Reference Circuits

    Katsuji KIMURA  

     
    LETTER

      Vol:
    E77-A No:2
      Page(s):
    398-402

    Novel circuit design techniques for CMOSFET (complementary MOS field-effet transistor)-only bias circuits, which each include a current mirror with a peaking characteristic, a current reference with a positive temperature coefficient, and a voltage reference with an optional temperature dependence, are described. An MOS Nagata current mirror is analyzed, and bias circuits like a CMOS self-biasing Nagata current reference and a CMOS self-biasing Nagata voltage reference, both of which include an MOS Nagata current mirror, are discussed. In addition, a CMOS temperature coefficient shifter, used to add an offset voltage and an optional temperature coefficient to a reference voltage, is also discussed. The CMOS Nagata voltage reference was verified with a breadboard using discrete componente and a 0.15 mV/ temperature dependence.

  • Bandgap Narrowing and Incomplete Ionization Calculations for the Temperature Range from 40 K up to 400 K

    Yevgeny V. MAMONTOV  Magnus WILLANDER  

     
    PAPER-Semiconductor Materials and Devices

      Vol:
    E77-C No:2
      Page(s):
    287-297

    The theoretical modelling bandgap narrowing and percentage of ionized impurity atoms for uncompensated uniformly doped silicon containing conventional impurities (B, P, As, Sb) under thermodynamic-equilibrium conditions is presented. As distinct from existing approaches, this modelling is valid for impurity concentrations up to electrically-active-impurity-concentration limits and for the temperature range from 40 K up to 400 K. A relevant and efficient calculation software is proposed. The results of the calculations are compared with the results extracted by many authors from measurement data. A good agreement between these results is noted and possible reasons of some discrepancies are pointed out. The present modelling and software can be used for investigation of BJT charge-neutral regions as well as diffused or implanted resistors.

  • Electrical Properties of Si Metal Insulator Semiconductor Tunnel Emitter Transistor (Si MIS TET)

    Tomomi YOSHIMOTO  

     
    PAPER-Semiconductor Materials and Devices

      Vol:
    E77-C No:1
      Page(s):
    63-68

    A Si metal insulator semiconductor tunnel emitter transistor (Si MIS TET) which is a new type of bipolar transistor was fabricated and its electrical properties for the temperature range of 100 K - 300 K were investigated. The common emitter mode current gain obtained was 75 at 300 K and 74 at 100 K. It was confirmed by measuring the temperature dependence of the base current that the inversion base layer indeed functioned as a base of the Si MIS TET. The current gain of the Si MIS TET did not decrease at low temperature of 100 K, though the current gain of the conventional Si bipolar transistor decreases at low temperature due to the emitter bandgap narrowing in heavily doped emitter. This origin was that the carrier injection mechanism between the emitter and the base was tunneling.

  • Silicon Integrated Injection Logic Operating up to 454

    Masayoshi TAKEUCHI  Masatoshi MIGITAKA  

     
    PAPER

      Vol:
    E76-C No:12
      Page(s):
    1812-1818

    In order to develop silicon ICs operating up to above 450, Integrated Injection Logic (IIL) was chosen. A new structure for IIL was designed through experimental and theoretical studies of pn junctions, transistors, and IIL at high temperatures. A 5-µm design rule was used. The new IIL was fabricated by a specially developed combined process of ion implantation and low temperature epitaxy. The IIL was fully operational from room temperature to 454, and the output amplitude of a nine-stage ring oscillator was about 30 mV at 454. The minimum delay time of the IIL was 22 nsec at 454. The minimum power-delay product was 11 pJ and was one-third of that for IILs fabricated by 10-µm rule at 50.

  • Performance Evaluation of ECG Compression Algorithms by Reconstruction Error and Diagnostic Response

    Kohro TAKAHASHI  Satoshi TAKEUCHI  Norihito OHSAWA  

     
    PAPER

      Vol:
    E76-D No:12
      Page(s):
    1404-1410

    An electrocardiogram (ECG) data compression algorithm using a polygonal approximation and the template beat variation method (TBV) has been evaluated by reconstruction error and automatic interpretation. The algorithm combining SAPA3 with TBV (SAPA3/TBV) has superior compression performance in PRD and compression ratio. The reconstruction errors, defined as the difference of the amplitude and the time duration between the original ECG and the reconstructed one, are large at waves with small amplitude and/or gradual slopes such as the P wave. Tracing rebuilt from the compressed ECG has been analysed using the automatic interpretative program, and the diagnostic answers with the realated measurements have been compared with the results obtained on the original ECG. The data compression algorithms (SAPA3 and SAPA3/TBV) have been tested on 100 cases in the data base produced by CSE. The reconstruction errors are related to the diagnostic errors. The TBV method suppresses these errors and more than 90% of diagnostic agreements at the error limit of 15µV can be obtained.

  • Data Compression of Ambulatory ECG by Using Multi-Template Matching and Residual Coding

    Takanori UCHIYAMA  Kenzo AKAZAWA  Akira SASAMORI  

     
    PAPER

      Vol:
    E76-D No:12
      Page(s):
    1419-1424

    This paper proposed a new algorithm of data compression for ambulatory ECG, where no distortion was included in the reconstructed signal, templates were constructed selectively from detected beats, and categorized ECG morphologies (templates) could be displayed in decoding the compressed data. This algorithm consisted of subtracting a best-fit template from the detected beat with an aid of multi-template matching, first differencing of the resulting residuals and modified Huffman coding. This algorithm was evaluated by applying it to ECG signals of the American Heart Association (AHA) data base in terms of bit rates. Following features were indicated. (1) Decompressed signal coincided completely with the original sampled ECG data. (2) Bit rate was approximately 800 bps at the appropriate threshold 50-60 units (1 unit2.4µVolt) for the template matching. This bit rate was almost the same as that of the direct compression (encoding the first differenced signal of original signal). (3) The decompressed templates could make it easy to classify the templates into the normal and abnormal beats; this could be executed without fully decompressing the ECG signal.

  • Fabrication of YBa2Cu3O7x-PrBa2Cu3O7y Hetero-Structure by Using a Hollow Cathode Discharge Sputtering System

    Akio KAWABATA  Tadayuki KOBAYASHI  Kouichi USAMI  Toshinari GOTO  

     
    PAPER

      Vol:
    E76-C No:8
      Page(s):
    1236-1240

    A sputtering system using dc hollow cathode discharge was developed for the propose of high Tc superconducting devices. Using this system, as-grown superconducting thin films of YBCO have been formed on MgO and SrTiO3 substrates. Influence of the sputtering conditions such as the substrate temperature and discharge gas pressure on the Tc and lattice parameter was investigated. It was found that superconducting films on MgO with Tczero higher than 87 K ere routinely obtained at the pressure of 820 mTorr (5%O2) and substrate temperature of 700 during deposition. The a/b-axis and c-axis oriented YBCO-PBCO hetero-structures were also successfully formed on MgO and SrTiO3 substrates.

  • An Adaptive Sensing System with Tracking and Zooming a Moving Object

    Junghyun HWANG  Yoshiteru OOI  Shinji OZAWA  

     
    PAPER-Image Processing, Computer Graphics and Pattern Recognition

      Vol:
    E76-D No:8
      Page(s):
    926-934

    This paper describes an adaptive sensing system with tracking and zooming a moving object in the stable environment. Both the close contour matching technique and the effective determination of zoom ratio by fuzzy control are proposed for achieving the sensing system. First, the estimation of object feature parameters, 2-dimensional velocity and size, is based on close contour matching. The correspondence problem is solved with cross-correlation in projections extracted from object contours in the specialized difference images. In the stable environment, these contours matching, capable of eliminating occluded contours or random noises as well as background, works well without heavy-cost optical flow calculation. Next, in order to zoom the tracked object in accordance with the state of its shape or movement practically, fuzzy control is approached first. Three sets of input membership function--the confidence of object shape, the variance of object velocity, and the object size--are evaluated with the simplified implementation. The optimal focal length is achieved of not only desired size but safe tracking in combination with fuzzy rule matrix constituted of membership functions. Experimental results show that the proposed system is robust and valid for numerous kind of moving object in real scene with system period 1.85 sec.

  • An Application of Regular Temporal Logic to Verification of Fail-Safeness of a Comparator for Redundant System

    Kazuo KAWAKUBO  Hiromi HIRAISHI  

     
    PAPER

      Vol:
    E76-D No:7
      Page(s):
    763-770

    In this paper we propose a method of formal verfication of fault-tolerance of sequential machines using regular temporal logic. In this method, fault-tolerant properties are described in the form of input-output sequences in regular temporal logic formulas and they are formally verified by checking if they hold for all possible input-output sequences of the machine. We concretely illustrate the method of its application for formal verification of fail-safeness with an example of a comparator for redundant system. The result of verification shows effectiveness of the proposed method.

  • Noise Temperature of Active Feedback Resonator (AFR)

    Youhei ISHIKAWA  Sadao YAMASHITA  Seiji HIDAKA  

     
    PAPER

      Vol:
    E76-C No:6
      Page(s):
    925-931

    An active feedback resonator (AFR) is a kind of circuit which functions as a high unloaded Q resonator. The AFR employs an active feedback loop which compensates for the energy loss of a conventional microwave resonator. Owing to an active element in the AFR, thermal noise should be taken into account when designing the AFR. In order to simplify a circuit design using the AFR we introduced noise temperature (Tn) for the AFR. In addition, we describe the AFR design which gives minimum noise temperature. Finally, the noise temperature, measured in an AFR as a band elimination filter, is compared with the theoretical value to evaluate the AFR.

  • Process and Device Technologies of CMOS Devices for Low-Voltage Operation

    Masakazu KAKUMU  

     
    INVITED PAPER

      Vol:
    E76-C No:5
      Page(s):
    672-680

    Process and device technologies of CMOS devices for low-voltage operation are described. First, optimum power-supply voltage for CMOS devices is examined in detail from the viewpoints of circuit performance, device reliability and power dissipation. As a result, it is confirmed that power-supply voltage can be reduced without any speed loss of the CMOS device. Based upon theoretical understanding, the author suggests that lowering threshold voltage and reduction of junction capacitance are indispensable for CMOS devices with low-voltage supply, in order to improve the circuit performance, as expected from MOS device scaling. Process and device technologies such as Silicon On Insulator (SOI) device, low-temperature operation and CMOS Shallow Junction Well FET (CMOS-SJET) structure are reviewed for reduction of the threshold voltage and junction capacitance which lead to high-seed operation of the COMS device at low-voltage.

  • An Optical Flow Estimation Algorithm Using the Spatio-Temporal Hierarchical Structure

    Shin Hwan HWANG  Sang Uk LEE  

     
    LETTER

      Vol:
    E76-D No:4
      Page(s):
    507-515

    In this letter, we propose an algorithm to estimate the optical flow fields based on a hierarchical structure composed of spatio-temporal image pyramids obtained from repetitive application of the Gaussian filtering and decimation in both the spatial and temporal domain. In our approach, an inter-level motion smoothness constraint between adjacent pyramid levels is introduced to estimate a unique optical flow field. We show that the pyramid structure allows us to employ the multigrid algorithm, which is known to accelerate the convergence rate. The multigrid algorithm provides a scheme for efficient combination of local and global information to estimate the optical flow field. The experimental results reveal that the combination of local and global information yields a fast convergence behavior and accurate motion estimation results.

  • Low-Temperature Reactive Ion Etching for Multi-Layer Resist

    Tetsuo SATO  Tomoaki ISHIDA  Masahiro YONEDA  Kazuo NAKAMOTO  

     
    PAPER-Process Technology

      Vol:
    E76-C No:4
      Page(s):
    607-612

    The effects of low temperature etching for sub-half micron multi-layer resist are investigated. The low temperature etching with pure O2 gas provides higher anisotropic profiles than with an additional gas such as Cl2, N2. This is caused by the difference in the formative process of the side wall protection. With pure O2 gas at 80, highly anisotropic profiles for 0.35 µm patterns can be performed while the maximum tolerable width loss is below 0.03 µm.

  • Analysis of Localized Temperature Distribution in SOI Devices

    Hizuru YAMAGUCHI  Shigeki HIRASAWA  Nobuo OWADA  Nobuyoshi NATSUAKI  

     
    PAPER-SOI Devices

      Vol:
    E75-C No:12
      Page(s):
    1438-1441

    Localized temperature distribution in silicon on insulator (SOI) structures with trench isolations is calculated using three-dimensional computer simulation. Temperature rise in SOI transistors is about three times higher than in conventional structure transistors because the thermal conductivity of SiO2 is very low. If there are voids in the SiO2 layers and trench isolations, temperature in the SOI transistors increases significantly. A simple model is proposed to calculate steady-state temperature rise in SOI transistors.

  • Hot-Carrier-Induced Photon Emission in Thin SOI/MOSFETs

    Seiichiro KAWAMURA  Takami MAKINO  Kazuo SUKEGAWA  

     
    PAPER-Hot Carrier

      Vol:
    E75-C No:12
      Page(s):
    1471-1476

    A study of hot-carrier-induced photon emission in thin SOI/MOSFETs has been carried out both for bonded-SOI and SIMOX/SOI. The photon emission is observed not only in the drain region but also in the source region for SOI/MOSFETs, whereas only in the drain region for conventional bulk MOSFETs. From the emission spectrum, it can be concluded that the emission mechanism of the source region is probably a photon-assisted direct recombination of electrons and holes, while both the recombination and Bremsstrahlung are the possible mechanism for the drain region. The total photo intensity from SOI/MOSFETs increases as the SOI film thickness decreases, showing that strong impact ionization occurs near the drain region for thinner SOI devices. The relation between the lifetime and the photo intensity for SOI/MOSFETs is very similar to that between the lifetime and the substrate current for conventional bulk/MOSFETs, proving that photon emission is a good indicator of the hot carrier degradation in thin SOI/MOSFETs. The lifetime measurement using the photon emission both for SOI and bulk devices indicates that longer lifetime can be expected for thin film SOI/MOSFETs with a reduced drain bias which will be indispensable for future sub-half micron MOSFETs.

  • High-Temperature Operation of nMOSFET on Bonded SOI

    Yoshihiro ARIMOTO  

     
    PAPER-SOI Devices

      Vol:
    E75-C No:12
      Page(s):
    1442-1446

    This paper describes high-temperature operation of nMOSFET on bonded SOI. A long-channel nMOSFET is fabricated on bonded SOI (Si layer thickness 0.3 µm), SOS (Si layer thickness 0.3 µm), and bulk Si, Bonded SOI is produced using pulse-field-assisited bonding and resistivity-sensitive etching. The high-temperature operation of bonded SOI nMOSFET is demonstrated and compared with SOS and bulk MOSFETs. The leakage current variation with temperature is signnificantly smaller in bonded SOI and in SOS than in bulk MOSFETs. At high temperatures, the drain current to leakage current ratio is 100 times higher in bonded SOI than in SOS and bulk devices. At 300, a ratio of 104 is obtained for the bonded SOI nMOSFET. The ratio is expected to be even higher if a reduced channel length and ultrathin (less than 0.1 µm) bonded SOI is used.

  • Net-Oriented Analysis and Design

    Shinichi HONIDEN  Naoshi UCHIHIRA  

     
    INVITED PAPER

      Vol:
    E75-A No:10
      Page(s):
    1317-1325

    Net-Oriented Analysis and Design (NOAD) is defined as three items: (1) Various nets are utilized as an effective modeling method. (2) Inter-relationships among verious nets are determined. (3) Verification or analysis methods for nets are provided and they are implemented based on the mathematical theory, that is Net theory. Very few methods have been presented to satisfy these three items. For example, the Real-Time SA method covers item (1) only. The Object-Oriented Analysis and Design method (OOA/OOD) covers items (1) and (2). NOAD can be regarded as an extension to OOA/OOD. This paper discusses how effectively various nets have been used in actual software development support metnods and tools and evaluates such several methods and tools from the NOAD viewpoint.

581-600hit(607hit)