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26121-26140hit(26286hit)

  • Network Planning of NTT

    Toshiharu AOKI  

     
    INVITED PAPER

      Vol:
    E75-B No:7
      Page(s):
    541-549

    Network planning for a public switched telephone network is essentially the same as the company's business strategy. The social environment providing the market for communications services is undergoing rapid change in Japan as it evolves from an era of one basic mainstay service-namely, plain-old telephone service-to one in which a wide range of advanced new services are, or soon will be, available and there is fierce competition to provide those services. This paper covers some of the thinking behind NTT's strategy to put in place a flexible and effectual network that fully reflects the needs and desires of customers in this fast-changing environment.

  • Evaluating Operating Costs for Fiber Optic Subscriber Loops

    Hideo IMANAKA  Noriyuki IKEUCHI  

     
    PAPER

      Vol:
    E75-B No:7
      Page(s):
    579-584

    This paper describes a method of evaluating operations effort for fiber optic subscriber loops, such as the Central Terminal/Remote Terminal (CT/RT) system, which can economically provide a variety of telecommunication services. Four system configurations with different operation procedures are evaluated by simulation. By evaluating the operating costs associated with service provisioning, it is shown that automatic distributing frames are cost effective in subscriber loops with CT/RT systems. Moreover, the most economical operation strategies for installing and extending subscriber boards are discussed in terms of facility and operations cost.

  • Considerations on Cost-Efficiency of ATM Network

    Hideaki HORIGOME  Hisao UOSE  

     
    PAPER

      Vol:
    E75-B No:7
      Page(s):
    572-578

    The Asynchronous Transfer Mode (ATM) is expected to be the basic transmission technology for B-ISDN. Before this happens, however, it will be necessary to predict the impact of fully-deployed ATM-based networks quantitatively. This paper compares the cost-efficiency of an ATM-based network with that of an STM-based network and clarifies the applicable areas of ATM network configurations, in terms of required facilities and considering the effect of statistical multiplexing. It shows cost-effective network configurations based on different service classes and a network configuration suited to ATM. It also discusses the effect of a Synchronous Digital Hierarchy architecture for Virtual Path dimensioning.

  • Planning Global Intelligent Networks

    Stephen CHEN  Arik N. KASHPER  

     
    INVITED PAPER

      Vol:
    E75-B No:7
      Page(s):
    550-555

    The globalization of business where single products and services are designed, developed, and manufactured in many different countries signals a significant need for cost-effective and reliable information movement and management capabilities. Similarly, consumers are seeking technologies which will allow them to visit the Smithsonian, scan a book in the Oxford Library, and interview a Japanese monk for a school report, all from the comfort of home. A necessary ingredient for realizing this global society is a strong telecommunications infrastructure. Our paper describes some of the customer needs and technology advances that are causing a revolution in planning global telecommunications networks. We present a new telecommunications paradigm and study its impact in two key areas: multi-country network routing at both the traffic and facility levels, and global network robustness.

  • Polynomially Sparse Variations and Reducibility among Prediction Problems

    Naoki ABE  Osamu WATANABE  

     
    PAPER

      Vol:
    E75-D No:4
      Page(s):
    449-458

    We investigate the relationship between two different notions of reducibility among prediction (learning) problems within the distribution-free learning model of Valiant (PAC learning model). The notions of reducibility we consider are the analogues for prediction problems of the many-one reducibility and of the Turing reducibility. The former is the notion of prediction preserving reducibility developed by Pitt and Warmuth, and its generalization. Concerning these two notions of reducibility, we show that there exist a pair of prediction problems A and B, whose membership problems are polynomial time solvable, such that A is reducible to B with respect to the Turing reducibility, but not with respect to the prediction preserving reducibility. We show this result by making use of the notion of a class of polynomially sparse variants of a concept representation class. We first show that any class A of polynomially sparse variants of another class B is reducible to B with respect to the Turing reducibility'. We then prove the existence of a prediction problem R and a class R of polynomially sparse variants of R, such that R does not reduce to R with respect to the prediction preserving reducibility.

  • Analysis of an Integrated Multiplexer with All Queueable and Fixed-Length Traffics in Intermediate Node

    Chung-Ju CHANG  Shyh-Yih WANG  

     
    PAPER-Communication Networks and Service

      Vol:
    E75-B No:7
      Page(s):
    657-664

    An integrated multiplexer in intermediate node is analyzed. The multiplexer is modeled as a system with multiple synchronous servers (channels) and having two kinds of customers. Between the two, one is wideband (WB) and the other is narrowband (NB); they are queueable with the same deterministic service time. The WB customer is given higher priority of channel access than the NB. To incorporate the delay constraint of WB, we use a simple instant discarding scheme for WB. As a result, the system states defined just after the beginning of a slot form an one-dimensional embedded Markov chain. This makes the analysis computationally tractable. The performance measures such as queue length distribution, average blocking probability, and average waiting time are obtained, particularly, the waiting time distribution. Some interesting numerical examples are discussed. Simulation results are also provided to help verify the validity of analysis.

  • On the Computation of 16-QAM and 64-QAM Performance in Rayleigh-Fading Channels

    Peter-Marc FORTUNE  Lajos HANZO  Raymond STEELE  

     
    PAPER

      Vol:
    E75-B No:6
      Page(s):
    466-475

    Quadrature Amplitude Modulation (QAM) schemes are attractive in terms of bandwidth efficiency and offer a number of subchannels with different integrities via both Gaussian and Rayleigh-fading channels. Specifically, the 16-QAM phasor constellation has two, while the 64-QAM possesses three such subchannels, which become dramatically different via Rayleigh-fading channels. The analytically derived bit error rate (BER) formulae yield virtually identical curves with simulation results, exhibiting adequate BERs for the highest integrity subchannels of both 16-QAM and 64-QAM to be further reduced by forward error correction coding (FEC). However, the BERs of the lower integrity subchannels require fading compensation to reduce their values for FEC techniques to become effective. This property creates ground for a variety of carefully matched, embedded mobile transmission schemes of different complexities. The practical implementation of such an embedded scheme is demonstrated by a low-cost, low-complexity and low-consumption 50KBd mobile video telephone scheme offering adequate speech and image quality for channel SNRs in excess of about 20dB via Rayleigh-fading channels.

  • On Multiple Alignment of Genome Sequences

    Masanori OHYA  Satoru MIYAZAKI  Koji OGATA  

     
    INVITED PAPER

      Vol:
    E75-B No:6
      Page(s):
    453-457

    We introduce new computer algorithm of multiple alignment as an application of "Simulated Annealing" method. Simulated Annealing has been applied to some combinational optimization problems such as travelling salesman problem. After giving short mathematical explanation of this method, we construct genetic distance and matrix corresponding to the object function in the annealing theory for the multiple alignment. Our method is better than other alignment in the sense that we obtain a result having a smaller value for the genetic distance. We discuss further development along on new method.

  • Theoretical Analysis of the Capacity Controlled Digital Mobile System in the Presence of Interference and Thermal Noise

    Hee-Jin LEE  Shozo KOMAKI  Norihiko MORINAGA  

     
    PAPER

      Vol:
    E75-B No:6
      Page(s):
    487-493

    This paper analyzes the performance of the capacity controlled digital radio system, which controls the number of modulation levels according to the amount of traffic. These analyses are performed under thermal noise and co-channel interference. As a result, the throughput improvement is approximately 16 times comparing with the fixed capacity system which has the designed outage probability of 0.1%. Theoretical results are applied to the future mobile communication system which utilizes TDMA access method or burst co-dec, and it is found that the reuse distance can be improved to 1/5 times when the designed outage probability is 0.1%.

  • Interlace Coding System Involving Data Compression Code, Data Encryption Code and Error Correcting Code

    Takaya YAMAZATO  Iwao SASASE  Shinsaku MORI  

     
    PAPER

      Vol:
    E75-B No:6
      Page(s):
    458-465

    An Interlace Coding System (ICS) involving data compression code, data encryption code and error correcting code is proposed and its error performance on additive white Gaussian noise (AWGN) channel with quadrature phase shift keying (QPSK) is analyzed. The proposed system handles data compression, data encryption and error correcting processes together, i.e. adds error correcting redundancy to the block lists of the dictionary in which compression system constructs to reduce source redundancy. Each block list is encoded by Ziv-Lempel code and Data Encryption Standard (DES). As the catastrophic condition determined by the data compression procedure is not negligible, error correcting redundancy should be added so as to avoid catastrophic condition. We found that the catastrophic condition depends only on the size of the dictionary for our proposed system. Thus, by employing a large dictionary, good error performance can be applied by the proposed system and the catastrophic condition can be avoided.

  • An Optical Receiver Overcome the Standard Quantum Limit

    Tsuyoshi SASAKI  Osamu HIROTA  

     
    PAPER

      Vol:
    E75-B No:6
      Page(s):
    514-520

    A study on the limitation of optical communication systems has received much attention. A method to overcome the standard quantum limit is to apply non-standard quantum state, especially squeezed state. However, the advantage of the non-standard quantum state is degraded by the transmission energy loss. To cope with this problem, we have proposed a concept of the received quantum state control (RQSC), but the realization has some difficulties. In this paper, we propose a new system to realize the received quantum state control system, employing injection locked laser (ILL) system. Then we show that our new system can overcome the standard quantum limit.

  • An Elastic-Block Matching Algorithm Using a Bilinear Space Warping

    Hansoo KIM  Jae-Kyoon KIM  

     
    PAPER-Digital Image Processing

      Vol:
    E75-A No:6
      Page(s):
    726-728

    A new Elastic-Block Matching Algorithm using bilinear space warping is proposed. In this scheme a convex quadrilateral, which minimizes a distortion measure against the current square block, is searched to compensate the shape deformation caused by a rigid body's 3 dimensional depth motion or rotation. The proposed algorithm gives a remarkable improvement in motion-compensated prediction compared with the conventional algorithm.

  • Parallel VLSI Processors for Robotics Using Multiple Bus Interconnection Networks

    Bumchul KIM  Michitaka KAMEYAMA  Tatsuo HIGUCHI  

     
    PAPER-Robot Electronics

      Vol:
    E75-A No:6
      Page(s):
    712-719

    This paper proposes parallel VLSI processors for robotics based on multiple processing elements organized around multiple bus interconnection networks. The advantages of multiple bus interconnection networks are generality, simplicity of implementation and capability of parallel communications between processing elements, therefore it is considered to be suitable for parallel VLSI systems. We also propose the optimal scheduling formulated in an integer programming problem to minimize the delay time of the parallel VLSI processors.

  • Realization of Immittance Floatator Using Nullors

    Masami HIGASHIMURA  Yutaka FUKUI  

     
    PAPER-Analog-IC Circuit Analysis and Synthesis

      Vol:
    E75-A No:6
      Page(s):
    644-649

    This paper treats the synthesis of immittance floatator using nullors. Eight sets of circuit equations for realizing immittance floatators and their nullor (nullator-norator) representations are given. By replacing nullors with active elements such as biporlar junction transistors (BJTs), current conveyors (CCIIs), operational amplifiers (OAs) and operational transconductance amplifiers (OTAs), the immittance floatators can be derived. The development is important because it enables one to convert the present wealth of knowledge concerning grounded immittance simulation networks into floating immittance simulation networks. Using immittance floatators, we can obtain not only the floating form of 1-port but also that of 2-port networks. Novel circuits use solely minus-type norators. Using one-type (minus- or plus-type) norators greatly simplifies the simulation circuit. In the case of an immittance floatator using CCIIs as the active elements, the effects of nonideal CCIIs and sensitivities are given. Many circuits can be systematically derived using nullor technique.

  • Improving Current Mode DC-DC Converter Design in Chaotic Working Conditions

    Salvatore BAGLIO  Luigi FORTUNA  

     
    LETTER-Nonlinear Phenomena and Analysis

      Vol:
    E75-A No:6
      Page(s):
    744-746

    In this letter, introducing a highly accurate model for a real current mode DC-DC converter, an innovative design strategy is proposed in order to optimize circuit behavior in cases in which chaotic effects are present.

  • Reduced-Size Double Crosstie Slow-Wave Transmission Lines for MMICs

    Hideki KAMITSUNA  Hiroyo OGAWA  

     
    PAPER

      Vol:
    E75-C No:6
      Page(s):
    721-728

    This paper proposes three configurations of slow-wave transmission lines for MMICs, i.e., double crosstie slow-wave transmission line (DCT-SLW), meander-like DCT-SLW and lumped DCT-SLW. The DCT-SLW is based on periodic structures and triplate structures. The meander-like DCT-SLW realizes a drastic size reduction in the DCT-SLW using a meander configuration of inductive and capacitive transmission lines. The multilayer spiral inductors are introduced to obtain high impedance characteristics of the meander section. The lumped DCT-SLW achieves a large slow-wave factor of 30. These proposed structures are analytically and experimentally investigated, and excellent performance is obtained. It is also shown that the proposed DCT-SLWs are superior to thin film microstrip (TFMS) lines with the same insertion phase, as regards size.

  • Current-Mode Analog Fuzzy Hardware with Voltage Input Interface and Normalization Locked Loop

    Mamoru SASAKI  Nobuyuki ISHIKAWA  Fumio UENO  Takahiro INOUE  

     
    PAPER-Analog-IC Circuit Analysis and Synthesis

      Vol:
    E75-A No:6
      Page(s):
    650-654

    In this paper, voltage-input current-output Membership Function Circuit (MFC) and Normalization Locked Loop (NLL) are proposed. They are useful building blocks for the current-mode analog fuzzy hardware. The voltage-input current-output MFC consists of one source coupled type Operational Transconductance Amplifier (OTA). The MFC is used in the input parts of the analog fuzzy hardware system. The fuzzy hardware system can execute the singleton fuzzy control algorithm. In the algorithm, the weighted average operation is processed. When the weighted average operation is directly realized by analog circuits, a divider must be implemented. Here, the NLL circuit, which can process the weighted average operation without the divider, is implemented using one source coupled type OTA. The proposed circuits were designed by using 2 µm CMOS design rules and its operations were confirmed using SPICE simulations.

  • Multiterminal Filtering for Decentralized Detection Systems

    Te Sun HAN  Kingo KOBAYASHI  

     
    INVITED PAPER

      Vol:
    E75-B No:6
      Page(s):
    437-444

    The optimal coding strategy for signal detection in the correlated gaussian noise is established for the distributed sensors system with essentially zero transmission rate constraint. Specifically, we are able to obtain the same performance as in the situation of no restriction on rate from each sensor terminal to the fusion center. This simple result contrasts with the previous ad hoc studies containing many unnatural assumptions such as the independence of noises contaminating received signal at each sensor. For the design of optimal coder, we can use the classical Levinson-Wiggins-Robinson fast algorithm for block Toeplitz matrix to evaluate the necessary weight vector for the maximum-likelihood detection.

  • Intermediate-Frequency-Combining Polarization Diversity Using Frequency Conversion

    Hideaki TSUSHIMA  Shinya SASAKI  Shigeki KITAJIMA  Katsuhiko KUBOKI  

     
    PAPER

      Vol:
    E75-B No:6
      Page(s):
    506-513

    An intermediate-frequency-combining (IF-combining) polarization diversity using frequency conversion is proposed. The proposed diversity requires no phase controller as opposed to the conventional IF-combining diversity. It has been theoretically clarified that this diversity has polarization insensitive bit-error-rate (BER) characteristics. The effectiveness has been confirmed by experiments in which the sensitivity dependence on the polarization is suppressed to within 0.8dB and a stable 101km fiber transmission at 600Mbit/s is achieved.

  • Multi-Branch Power Dividers Using Multilayer MMIC Technology

    Takao HASEGAWA  Seiichi BANBA  Hiroyo OGAWA  Tsuneo TOKUMITSU  

     
    PAPER

      Vol:
    E75-C No:6
      Page(s):
    707-712

    This paper describes multi-branch Wilkinson power dividers using multilayer MMIC technology. Circuit configuration is simplified and the circuit area is effectively minimized using thin film microstrip lines. An impedance transformer between the input port and the divided point is introduced to complete impedance matching and reduce insertion loss in multi-branch power dividers. Size-reduced planar-type 2-, 4-, and 8-branch Wilkinson power dividers are produced and performed well.

26121-26140hit(26286hit)