We have developed a method to automatically generate a multi-input-adder circuit for an irregular array of partial products. "FASTOOL," an FIR Filter Automatic Synthesis TOOL for an HDL design environment, is proposed for use with this method and with conventional filter coefficient design programs. Filter design from specifications to the structure of Verilog-HDL has been automated. It is possible for a system designer to quickly perform filter LSI optimization by balancing cost and performance.

To evaluate the radial eigenmode field distributions and the resonance wavelengths of axially symmetric pillbox resonator, a numerical method is described which is based on the FE-BPM expression in cylindrical coordinates. Under the weakly guiding approximation, we solve Fresnel equation and can get a fairly accurate result. By using effective index method, 3-D pillbox guiding structure is reduced to 2-D one which is then used for the analysis. One advantage of this method is that it is applicable for the axially symmetric optical waveguides with arbitrary index distribution. The validity of this method is checked by comparing the results of this method with those of the analytical ones. This method is applied for the evaluation of the coupling properties of a coupled structure consisting of a pillbox resonator and a curved waveguide placed outside the pillbox. This coupled structure has a good prospect to be used as optical wavelength filter. By varying the separation distance between the pillbox and the outer curved waveguide, the power transfer due to coupling is determined near the resonance wavelength 0.9 µm.

High power interference rejection characteristics of a sidelobe canceller which have not been well discussed yet are investigated through computer simulation and experiment in the real radio wave environment. To improve the high power interference rejection performance, a new method is considered. The performance of the method is also analyzed through computer simulation and experiment.

Single-reference and multi-reference noise canceller (SRNC and MRNC) performances are investigated based on correlation between signal and noise. Exact relations between these noise canceller performances and signal-noise correlation have not been well discussed yet. In this paper, the above relations are investigated based on theoretical, analysis and computer simulation. The normalized LMS (NLMS) algorithm is employed. Uncorrelate, partially correlated, and correlated signal and noise combinations are taken into account. Computer simulation is carried out, using real speech, white noise, real noise sound, sine wave signals, and their combinations. In the SRNC problem, spectral analysis is applied to derive the canceller output power spectrum. From the simulation results, it is proven that the SRNC performance is inversely proportional to the signal-noise correlation as expected by the theoretical analysis. From the simulation results, the MRNC performance is more sensitive to the signal-noise correlation than that of SRNC. When the signal-noise correlation is high, by using a larger number of adaptive filter taps, the noise is reduced more, and, the signal distortion is increased. This means the signal components included in the noise are canceled exactly.

Computer circumstance have changed drastically, and larger capacity removable media is indispensable. Magneto-optical disk is promising candidate to satisfy computer user's needs. In this report, future perspective of high density magneto-optical recording technology is investigated.

This paper proposes a hardware architecture of programmable controller based on Petri nets. The suggested architecture achieves sufficiently rapid processing even as demands on PCs become increasingly more complex. The architecture's speed and efficiency are derived from an automatic and dynamic super scalar computing capability that executes bit instructions and data handling instructions simultaneously without preprocessing, due to the properties of Petri nets. Specific characteristics for both architectural memory-based implementation of Petri nets and evolution algorithms are suggested and classified by the net structure. Analysis of the suggested architectures and effects on performance are also given with mathematical formulas and a computer simulation.

A new high-performance fault-tolerant ATM switching network is proposed. This network contains the baseline network and has many redundant switching elements to enhance the fault tolerance and throughput of the conventional multistage interconnection networks. The presented routing algorithm is very simple and can support a very huge number of paths between each input-output pair. The paths can be used to route cells when internal cell contentions occur in switching elements. The redundant switching elements at the last stage offer two access points to the output ports to resolve the output conflict. Performance analysis and simulation results show that this network has better maximum throughput even for faulty conditions. Among various networks, it has the largest number of redundant paths, and the greatest unit node contribution and unit edge contribution.

We propose an equivalent circuit model described by the Rössler equation. Then we can consider a coupled Rössler system with a physical meaning on the connection. We consider an oscillatory circuit such that two identical Rössler circuits are coupled by a resistor. We have studied three routes to entirely and almost synchronized chaotic attractors from phase-locked periodic oscillations. Moreover, to simplify understanding of synchronization phenomena in the coupled Rössler system, we investigate a mutually coupled map that shows analogous locking properties to the coupled Rössler System.

We investigate a three-waveguide tapered velocity coupler which consists of a uniform linear, tapered linear and tapered nonlinear slab waveguide. The coupling characteristics depending on the gap width between the waveguides and sloping angle of the tapered waveguides are analyzed by means of the finite difference method. The numerical results show that with realistic structural parameters flat output power characteristics can be obtained over a wide range of input power. It is found that it is possible to use the present structure as a power limiter.

This paper proposes a masked data transferring method for the write-back controlled disk cache system employing a fixed-length recording disk drive, enabling data transfer of discontinuous sectors on the same track between the cache and the disk. This paper also evaluates the method. In write-back controlled disk cache sytems, random write requests cause dirty data (write-pending data on a cache) on discontinuous areas on the cache. It is likely that several sectors on the same track become dirty. These dirty sectors must be written onto the disk according to the cache management scheme. In conventional data transferring methods between a disk cache and a disk drive, plural sectors can be transferred in one single operation when the sectors are adjacent, but discrete sectors must be transferred by individual operations. In the methods, an address of the head sector and number of sectors to be transferred are given to the transfer unit. For example, when two sectors on the same track are located closely but not adjacently, and data transfer is requested for those two sectors, the transfer operation for the second sector must be prepared after the first transfer had completed and before the second sector arrives under the disk head. Although the time for the head to pass by the uninterested sector is often too short for the software overhead for the first transfer to be completed and the second transfer to be prepared, which leads to an unwanted extra rotation of the disk. With the masked transferring method proposed in this paper, the micro program creates a bit-map specifying the target sectors to be transferred and passes it to the data transfer unit, enabling to transfer the discontinuous sectors without latency. The method was evaluated using OLTP warkloads. Results show an improvement in random I/O throughput of between 8% and 27%. The masked transferring method is adopted in Hitachi's A-6521 disk subsytems, shipped since December 1993.

The integration of both real-time systems and fault-tolerant systems has been emerged as one of the greatest challenges of this decade. It is called a responsive system, which has the objective to optimeze both timeliness and reliability. The performance measure in responsive systems is responsiveness that tells how probable a system executes correctly on time with faults occurred. While there have been some achievements in communication protocols and specification, we believe that scheduling problems in responsive systems are not understood deeply and sufficiently, yet. In this paper, we discuss the scheduling problem in responsive systems. At first, we investigate the issues in the scheduling and propose the precise definition of the responsiveness. We also suggest a scheduling algorithm called Responsive Earliest Deadline First (REDF) for preemptive aperiodic tasks in a uniprocessor system. We show that REDF is optimal to obtain the maximum responsiveness, and the time complexity is analyzed to be (N 2N). By illustrating a contradictory example, it is shown that REDF can be enhanced if a constraint on tasks is released.

In this paper, we study the following node-to-node fault tolerant routing problem: In the presence of up to n-1 faulty nodes, find a fault-free path which connects any two non-faulty nodes s and t in an n-connected graph. For node-to-node fault tolerant routing in n-dimensional hypercubes Hn, we give an algorithm which finds a fault-free path s t of length at most in O(n) time, where d(s, t) is the distance between s and t. We also show that a fault-free path s t in Hn of length at most d(s, t)2i, 1i, can be found in time. For node-to-node fault tolerant routing in n-dimensional star graphs Gn, we give an algorithm which finds a fault-free path s t of length at most min{d(Gn)3, d(s, t)6} in O(n) time, where is the diameter of Gn. It is previously known that, in Hn, a fault-free path s t of length at most d(s, t) for d(s, t)n and at most d(s, t)2 for d(s, t)n can be found in O(d(s, t)n) time, and in Gn, a fault-free path s t of length at most min{d(Gn)1, d(s, t)4}can be found in O(d(s, t)n) time. When the time efficiency of finding the routing path is more important than the length of the path, the algorithms in this paper are better than the previous ones.

A novel series-tapered nonlinear directional coupler is proposed to improve all-optical switching characteristics. Its switching characteristics are analyzed by using a beam propagation method based on the Galerkin's finite element technique. It is presented that the critical power of the series-tapered nonlinear directional coupler is smaller than conventional uniform symmetric and tapered nonlinear directional couplers.

We study all-to-all broadcasting in hypercubes with randomly distributed Byzantine faults. We construct an efficient broadcasting scheme BC1-n-cube running on the n-dimensional hypercube (n-cube for short) in 2n rounds, where for communication by each node of the n-cube, only one of its links is used in each round. The scheme BC1-n-cube can tolerate (n-1)/2 Byzantine faults of nodes and/or links in the worst case. If there are exactly f Byzantine faulty nodes randomly distributed in the n-cabe, BC1-n-cube succeeds with a probability higher than 1(64nf/2n) n/2. In other words, if 1/(64nk) of all the nodes(i.e., 2n/(64nk) nodes) fail in Byzantine manner randomly in the n-cube, then the scheme succeeds with a probability higher than 1kn/2. We also consider the case where all nodes are faultless but links may fail randomly in the n-cube. Broadcasting by BC1-n-cube is successful with a probability hig her than 1kn/2 provided that not more than 1/(64(n1)k) of all the links in the n-cube fail in Byzantine manner randomly. For the case where only links may fail, we give another broadcasting scheme BC2-n-cube which runs in 2n2 rounds. Broadcasting by BC2-n-cube is successful with a high probability if the number of Byzantine faulty links randomly distributed in the n-cube is not more than a constant fraction of the total number of links. That is, it succeeds with a probability higher than 1nkn/2 if 1/(48k) of all the links in the n-cube fail randomly in Byzantine manner.

Silver is a fundamental material for electrical contact application. In spite of high electrical conductivity and economical advantage, silver surface is corroded easily by environment contained sulfide. A corrosion product as Ag2S deteriorates the property of contact reliability. In order to examine contact reliability, the acceleration tests have been accepted widely in industries. In the present study, the acceleration factor of the contact reliability for the sulfide film on the surface of silver contact which was subject to the tarnish acceleration test was clarified in comparison with the film grown in a normal office environment. The accelerated environment based on the Japan Electric Industry Development Association (JEIDA) standard No.25 was adopted. This environment is consisted of air contained 3 ppm H2S gas under 40, 85-95% RH. The growth rate of the sulfide film (Ag2S) was evaluated by applying the ellipsometry analysis. In the results, it was found that growth of Ag2S film of 500 in thickness in the normal office environment required corrosion time of 3103 h. This thickness of 500 caused increase in contact resistance of 0.1-1.0 (Ω). However, in the accelerated environment, corrosion time decreased to 1.7 h for same thickness. Therefore, the acceleration factor was obtained by comparison of these time as 1.8103 for the standard test of JEIDA.

This letter is concerned with the evaluation of the average computational complexity of the maximum likelihood decoding of a linear block code using its trellis diagram. Each section of the L-section minimal trellis diagram for a linear block code consists of parallel components which are structurally identical subgraphs without cross connection between them. A parallel component is also known to be decomposed into subgraphs, and a decoding algorithm by using the structure of the subgraphs of parallel components was proposed, and an upper bound on the worst case computational complexity was derived. In this letter, the average computational complexity of the decoding algorithm is evaluated by computer simulation. We evaluated the average numbers of additions and comparisons performed in the decoding algorithm for example codes, (64,45) extended and permuted binary primitive BCH code, the third order Reed-Muller (64,42) code and its (64,40) subcode. It is shown that the average numbers are much smaller than those for the worst case, and hence the decoding algorithm is efficient when the number of sections, L, is small, say 4 or 8, for the example codes. Especially, for the (64,45) extended binary primitive BCH code with L4, the average numbers of additions and comparisons in the decoding algorithm for finding the survivor's metric of each state after finding the smallest metric among parallel branches are about 1/50 and 17/100 of those in the conventional exhaustive search, respectively. The number of additions and comparisons by the conventional search for all the example codes is smallest when L is 4. As a result, the decoding algorithm with L4 gives the smallest number of operations among those decoding methods considered here.

A Ku-band transversal filter with a center frequency of 12 GHz and a bandwidth of 6 GHz using directional couplers made of a multilayer ceramic has been proposed and developed. The directional coupler can realize a wide range of frequency characteristics, e.g. coupling of 3.50.5 dB in the frequency range of 10 to 17 GHz and a wide range of coupling values, i.e. 3 to 35 dB. Calculations have confirmed that the increase in insertion loss due to a decreasing Q-factor can be much less than that for a resonator filter. The transversal filter was fabricated without additional tuning, and measured results agreed well with calculated values.

A description language for matrix and vector expressions and its compiler for DSPs are shown. They provide both a user-friendly programming environment and efficient codes. In order to increase throughput and to reduce amount of methods based on mathematical laws are introduced. A method to decide the matrix and vector storage location suitable for processing on DSP is also proposed.

This paper proposes a modified normalized LMS algorithm based on a long-term average of the reference input signal power. The reference input signal power for normalization is estimated by using two leaky integrators with a short and a long time constants. Computer simulation results compare the performance of the proposed algorithm with some previosuly proposed adaptive-step algorithms. The proposed algorithm converges faster than the conventional adaptive-step algorithms. Almost 30dB of the ERLE (Echo Return Loss Enhancement), which is comparable to the conventional algorithms, is achieved in noisy environments.

The firing squad synchronization problem is considered for defective cellular automata. A lower bound of time tf for the problem is derived. The state complexity to solve the problem is investigated and it is shown that the state set has to be arbitrary large to obtain solutions of time complexity (n). For memory-augmented defective cellular automata a tf-time solution is given.