In this paper, we propose an efficient IP-Level power model with a small lookup table for complex CMOS circuits. The table has only one dimension that maps the zero-delay charging and discharging capacitance (CDC) into the real power consumption of pattern pairs but still has high accuracy. In order to reduce the table size, we collect those pattern pairs with similar CDC values to be a group and only set an entry in the lookup table for each group. The proposed dynamic grouping process can automatically increase the entries of the lookup tables to cover the current CDC distribution of designs during the power characterization process. In order to improve the efficiency of characterization process, the Monte Carlo approach is used during the estimation for the average power of each group to skip the samples that will not increase the accuracy too much. After the power model of a circuit is built, the average power consumption for any test sequence can be estimated easily. The experimental result shows that the table sizes are only up to 107 entries for ISCAS'85 benchmark circuits and the estimation error is only 2.99% on average using this lookup table.

In this paper, the efficient structure of an LUT (look-up table) for an asynchronous reconfigurable PCA (Plastic Cell Architecture) device is investigated. A total of 15 types of implementation alternatives for LUTs are evaluated and compared in an empirical manner in which full custom layout design is developed and simulated. The evaluation results show that by introducing transmission gates in memory cells in an LUT, read time can be improved by 14.3% at the cost of 13.6% area increase compared to a conventional speed oriented implementation. It is also shown that use of transmission gates reduces 6.4% of area and 19.2% of read time against a conventional area oriented LUT implementation.

This paper proposes a new multistage technique of algebraic codebook in CELP coders called Trellis Search inspired from the Trellis Coded Quantization (TCQ). This search technique is implemented into the fixed codebook of the standard G.729 for objective evaluation on a large corpus of a testing speech database. Simulations results show that in terms of computer execution time the proposed search scheme reduces the codebook search by approximately 23% compared to the time of focused search used in the standard G.729. This yields to a reduction of about 8% in the computer execution time of the coder at the cost of a slight degradation of speech quality but perceptually not noticeable. Moreover, this new technique shows better speech quality than the G.729A at the expense of a higher complexity.

Finite-state vector quantization (FSVQ) is a well-known block encoding technique for digital image compression at low bit rate application. In this paper, an improved feature map finite-state vector quantization (IFMFSVQ) algorithm using three-sided side-match prediction is proposed for image coding. The new three-sided side-match improves the prediction quality of input blocks. Precoded blocks are used to alleviate the error propagation of side-match. An edge threshold is used to classify the blocks into nonedge or edge blocks to improve bit rate performance. Furthermore, an adaptive method is also obtained. Experimental results reveal that the new IFMFSVQ reduces bit rate significantly maintaining the same subjective quality, as compared to the basic FMFSVQ method.

This letter presents text-independent speaker identification results for telephone speech. A speaker identification system based on Karhunen-Loeve transform (KLT) derived from codebook design using genetic algorithm (GA) is proposed. We have combined genetic algorithm (GA) and the vector quantization (VQ) algorithm to avoid typical local minima for speaker data compression. Identification accuracies of 91% were achieved for 100 Mandarin speakers.

In this paper, we propose an equalizer for indoor infrared wireless systems using on-off keying code-division multiple-access (OOK-CDMA). The proposed equalizer has a decision-feedforward filter to mitigate the effects of inter symbol interference (ISI) at the previous chip position of the sampling instant. We evaluate the performance of indoor infrared wireless systems using OOK-CDMA with three kinds of equalizers: the decision-feedback qualizer (DFE), the feedforward equalizer (FE), and the proposed equalizer. To estimate the impulse response, we use the training sequence that alternates '1' and '0' sequentially. Among three kinds of equalizers, we show that the system with the proposed equalizer can achieve the best bit error rate (BER) performance at high bit rate, while the system with the FE achieves the best BER performance when the bit rate is low.

This paper presents an architecture for a table-lookup (TLU) engine that allows the real-time operation of complicated TLU for telecommunications, such as the longest prefix match (LPM) and the long-bit match in packet classification. The engine consists of many CAM (Content Addressable Memory) chips, which are classified into several groups. When actual TLU is performed, the entries in each CAM group are searched simultaneously, and the best entry candidate in each group is selected by an intra-group arbiter. The final output, the entry desired, is decided by an inter group arbiter that selects one group. This hierarchical structure of arbitration is the key to the scalability of the engine. To accelerate the operation speed of the engine, we introduce a novel mechanism called "hit-flag look-ahead" that sends a hit-flag signal from each matched CAM chip to the inter group arbiter before each intra group arbiter calculates the best CAM output in the group. We show that a TLU engine based on the above architecture achieves significantly fast performance compared to engines based on conventional techniques, especially in the case of a large number of entries with long-bit matching. Furthermore, our architecture can realize an 33.3 Mlps (lookups per second) within a 128 bit 300,000-entry table at wire speed.

A quasi-periodic signal is a periodic signal with period and amplitude variations. Several physiological signals, including the electrocardiogram (ECG), can be treated as quasi-periodic. Vector quantization (VQ) is a valuable and universal tool for signal compression. However, compressing quasi-periodic signals using VQ presents several problems. First, a pre-trained codebook has little adaptation to signal variations, resulting in no quality control of reconstructed signals. Secondly, the periodicity of the signal causes data redundancy in the codebook, where many codevectors are highly correlated. These two problems are solved by the proposed codebook replenishment VQ (CRVQ) scheme based on a bar-shaped (BS) codebook structure. In the CRVQ, codevectors can be updated online according to signal variations, and the quality of reconstructed signals can be specified. With the BS codebook structure, the codebook redundancy is reduced significantly and great codebook storage space is saved; moreover variable-dimension (VD) codevectors can be used to minimize the coding bit rate subject to a distortion constraint. The theoretic rationale and implementation scheme of the VD-CRVQ is given. The ECG data from the MIT/BIH arrhythmic database are tested, and the result is substantially better than that of using other VQ compression methods.

In this paper, we propose a novel architecture for low-power direct-mapped instruction caches, called "history-based tag-comparison (HBTC) cache. " The cache attempts to reuse tag-comparison results for avoiding unnecessary tag checks. Execution footprints are recorded into an extended BTB (Branch Target Buffer). In our evaluation, it is observed that the energy for tag comparison can be reduced by more than 90% in many applications.

In the previous work, Lampson et al. proposed an IP lookup algorithm which performs binary search on prefixes (BSP). The algorithm is attractive, even for IPv6, because of its bounded worst-case memory requirement. To achieve fast forwarding, it may need to slow down the insertion speed. Although this can be justified, the routing-table reconstruction in BSP is too time-consuming to handle the frequent route updates. In this work, we propose a fast forwarding-table construction algorithm which can accomplish more than 4,000 route updates per second. Moreover, it is simple enough to fulfill the need of fast packet forwarding. With the enhanced multiway search tree, we further reduced the depth of the tree and eliminated the pointer storage; this reduces the forwarding table size and shortens the lookup time.

The Quality of Service (QoS) reservations in Differentiated Service (DiffServ) networks can be classified into two sets: Book-ahead (BA) requests and Instantaneous Requests (IRs). When an admitted BA request becomes active, some ongoing IRs is dropped when the bandwidth is insufficient for supporting both IRs and BA requests. The admission control should predict the lifetime, i.e. look-ahead time, of the IRs to prevent the admitted IRs from being dropped. The control should then check whether the available bandwidth during the look-ahead time is sufficient for the incoming IRs. We propose an application-aware look-ahead admission control for IRs, which determines the look-ahead time for specific types of IR applications. An admitted BA request might block subsequent ones that could bring more effective revenue. Thus, we propose the deferrable model of the admission control for BA requests. Simulation results indicate that the application-aware look-ahead admission control successfully reduces the dropping probability and wasted revenue of IRs by up to 10 times and 30%, respectively. Besides, the deferrable model indeed results in more BA effective revenue.

This paper presents a new framework for synthesizing look-up table (LUT) networks. Some of the existing LUT network synthesis methods are based on one or two functional (Boolean) decompositions. Our method also uses functional decompositions, but we try to use various decomposition methods, which include algebraic decompositions. Therefore, this method can be thought of as a general framework for synthesizing LUT networks by integrating various decomposition methods. We use a cost database file which is a unique characteristic in our method. We also present comparisons between our method and some well-known LUT network synthesis methods, and evaluate the final results after placement and routing. Although our method is rather heuristic in nature, the experimental results are encouraging.

This paper proposes a fast algebraic codebook search for DSVD applications. In this method, the codebook search is simplified by reducing the number of possible position combinations using a mean-based track threshold multiplied by heuristically determined optimum threshold factor. And, to guarantee a complexity requirement of DSVD, the maximum number of searching position combinations is limited to 320. The proposed method reduced computational complexity considerably, compared with G.729 with a slight degradation of SNR. Particularly, it shows better speech quality with lower complexity than G.729A.

In this paper, we propose a high-speed multiplier-free realization using ROM's to store the results of coefficient scalings in combination with higher signal rate and pipelined operations, without the need of hardware multipliers. By varying some parameters, the proposed structure provides various combinations of hardware and clock speed (or throughput). Examples are given comparing the proposed realization with the distributed arithmetic (DA) realization and direct-form realization with power-of-two coefficients. Results show that with proper choices of the parameters the proposed structure achieves a faster processing speed with less hardware, as compared to the DA realization, while it is much faster than the direct-form with slightly more hardware.

We evaluate the performance of indoor infrared wireless systems using on-off keying code division multiple access (OOK-CDMA) with decision-feedback equalizer (DFE) on diffuse channels. To estimate the impulse response, we use the training sequence that alternates '1' and '0. ' We show that the OOK-CDMA with DFE and the training sequence can achieve better performance than the OOK-CDMA without DFE. We also show that the OOK-CDMA with DFE and the training sequence can achieve almost the same performance as the OOK-CDMA with DFE and the known impulse response.

This paper presents the design and simulation of a power efficient 1:4 interpolation FIR filter with partitioned look Up Table (LUT) structure. Using the symmetry of the filter coefficients and the contents of the LUT, the area of the proposed filter is minimized. The two filters share the partitioned LUT and activate the LUT selectively to realize the low power operation. Experimental results suggest that the proposed filter reduces the power consumption by 25% and simultaneously reduces the gate area by 7% compared to the previously proposed single-architecture dual-channel filter.

This paper studies the problem of book-embeddings of graphs. When each edge is allowed to appear in one or more pages by crossing the spine of a book, it is well known that every graph G can be embedded in a 3-page book. Recently, it has been shown that there exists a 3-page book embedding of G in which each edge crosses the spine O(log2 n) times. This paper considers a book with more than three pages. In this case, it is known that a complete graph Kn with n vertices can be embedded in a n/2 -page book without any edge-crossings on the spine. Thus it becomes an interesting problem to devise book-embeddings of G so as to reduce both the number of pages used and the number of edge-crossings over the spine. This paper shows that there exists a d-page book embedding of G in which each edge crosses the spine O(logd n) times. As a direct corollary, for any real number s, there is an ns -page book embedding of G in which each edge crosses the spine a constant number of times. In another paper, Enomoto-Miyauchi-Ota show that for an integer d, if n is sufficiently large compared with d, then for any embedding of Kn into a d-page book, there must exist Ω(n2 logd n) points at which edges cross over the spine. This means our result is the best possible for Kn in this case.

Internet Key Exchange (IKE) is very important as an entrance to secure communication over the Internet. The first phase of IKE is based on Diffie-Hellman (DH) key-agreement protocol. Since DH protocol on its own is vulnerable to man-in-the-middle (MIM) attack, IKE provides authentication to protect the protocol from MIM. This authentication owes a lot to public-key primitives whose implementation includes modular exponentiation. Since modular exponentiation is computationally expensive, attackers are motivated to abuse it for Denial-of-Service (DoS) attacks; computational burden caused by malicious requests may exhaust the CPU resource of the target. DoS attackers can also abuse inappropriate use of Cookies in IKE; as an anti-clogging token, Cookie must eliminate the responder's state during initial exchanges of the protocol while IKE Cookies do not. Thus a large number of malicious requests may exhaust the memory resource of the target. In search of resistance against those DoS attacks, this paper first reviews DoS-resistance of the current version of IKE and basic ideas on DoS-protection. The paper then proposes a DoS-resistant version of three-pass IKE Phase 1 where attackers are discouraged by heavy stateful computation they must do before the attack really burdens the target. DoS-resistance is evaluated in terms of the computational cost and the memory cost caused by bogus requests. The result shows that the proposed version gives the largest ratio of the attacker's cost to the responder's cost.

In this paper, a technique to reduce the overhead of Vector Quantization (VQ) coding is developed here. Our method exploits the inter-index correlation property to reduce the overhead to transmit encoded indices. Discrete Cosine Transform (DCT) is the tool to decorrelate the above correlation to get further bit rate reduction. As we know, the codewords in the codebook that generated from conventional LBG algorithm do not have any specified orders. Hence, the indices for selected codewords to represent respective adjacent blocks are random distributions. However, due to the homogeneous property existing among adjacent regions in original image, we re-arrange the codebook according to our predefined weighting criterion to enable the selected neighboring indices capable of indicating the homogeneous feature as well. Then, DCT is used to compress those VQ encoded indices. Because of the homogeneous characteristics existing among the selected adjacent indices after codebook permutation, DCT can achieve better compression efficiency. However, as we know, DCT introduces distortion by the quantization procedure, which yield error-decoded indices. Therefore, we utilize an index residue compensation method to make up that error decoded indices which have high complexity deviation to reduce those unpleasant visual effects caused by distorted indices. Statistics illustrators and table are addressed to demonstrate the efficient performance of proposed method. Experiments are carried out to Lena and other natural gray images to demonstrate our claims. Simulation results show that our method saves more than 50% bit rate to some images while preserving the same reconstructed image qualities as standard VQ coding scheme.

In this paper we propose a new pipelined architecture for the LMS adaptive filter which can be implemented with less than half the amount of calculation needed for the conventional architectures. Even though the proposed architecture reduces the required calculation, it can simultaneously produce good convergence characteristics, a short latency and high throughput characteristics.