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[Keyword] PAR(2741hit)

1741-1760hit(2741hit)

  • Distributed Policy-Based Management Enabling Policy Adaptation

    Kiyohito YOSHIHARA  Manabu ISOMURA  Hiroki HORIUCHI  

     
    PAPER-QoS (Quality of Service) Control

      Vol:
    E87-B No:7
      Page(s):
    1854-1865

    In policy-based management, in addition to deliver and enforce policies in managed systems, it is inevitable to manage the policy life-cycle. We mean the policy life-cycle as cyclic iteration of processes involving monitoring to see if the enforced policies actually work at operators' will and their adaptation based on monitoring. Enabling such policy life-cycle management by the current centralized management paradigm such as SNMP may, however, result in poor scalability and reliability. This is typically due to much bandwidth consumption for monitoring and communication failure between a management system and a managed system. It may also impose a heavy burden on the operators in analyzing management information for the policy adaptation. For a solution to that, we propose a scalable and reliable policy-based management scheme enabling the policy life-cycle management based on distributed management paradigm. In the scheme, we provide a new management script describing policies and how their life-cycle should be managed, and execute the script on the managed system with enough computation resources. The scheme can make the current policy-based management more scalable by reducing management traffic, more reliable by distributing management tasks to the managed systems, and more promising by relieving of the operators' burden. We implement a prototype system based on the scheme taking Differentiated Services as a policy enforcement mechanism, and evaluate the scheme from the following viewpoints: 1) the reliability, 2) relievability, and 3) scalability. The first two will be shown with a policy adaptation scenario in an operational network. The last one will be investigated in terms of the management traffic reduction by a management script, the management traffic required for the management of a management script, and the load on a managed system to execute management scripts. As deployment consideration of the proposed scheme besides technical aspects, we also discuss how the prototype system could be integrated with managed systems compliant to the standards emerging in the marketplace.

  • API Control Flow-Based Next Generation Service Creation Environment

    Yoshiko SUEDA  Jun MIYAKE  Yoshihiro NIITSU  

     
    PAPER-Software Development Environment

      Vol:
    E87-B No:7
      Page(s):
    1918-1925

    We describe a next generation service creation environment (SCE), which is designed to support efficient service application development for IP networks. Considering the IP-network environment we extract the features required for the next generation SCE and propose an architecture for the next generation SCE based on design concepts to provide these features. In our approach, we do not create large components, such as service features, or construct chains of them. Instead, we define application-programming interface (API) control flows through which we utilize existing APIs, such as open APIs. Since service providers, such as ASPs and third parties, must have some knowledge of the APIs, this capability will enable the development of services that correspond to various service provisioning patterns as well as to differentiation of services from those offered by other providers, without the addition of service components. The feasibility and productivity of the next generation SCE are evaluated by developing sample services, including a general Voice over IP (VoIP) service using a Parlay API and a presence service using a presence and availability management (PAM) API. Evaluation shows that the environment not only assists in the development of service applications but also raises the productivity of the next generation SCE itself, thus confirming its effectiveness the rapid, economical development of high-quality IP network services.

  • Address Computation in Configurable Parallel Memory Architecture

    Eero AHO  Jarno VANNE  Kimmo KUUSILINNA  Timo D. HAMALAINEN  

     
    PAPER-Networking and System Architectures

      Vol:
    E87-D No:7
      Page(s):
    1674-1681

    Parallel memories increase memory bandwidth with several memory modules working in parallel and can be used to feed a processor with only necessary data. The Configurable Parallel Memory Architecture (CPMA) enables a multitude of access formats and module assignment functions to be used within a single hardware implementation, which has not been possible in prior embedded parallel memory systems. This paper focuses on address computation in CPMA, which is implemented using several configurable computation units in parallel. One unit is dedicated for each type of access formats and module assignment functions that the implementation supports. Timing and area estimates are given for a 0.25-micron CMOS process. The utilized resources are shown to be linearly proportional to the number of memory modules.

  • A Distributed 3D Rendering Application for Massive Data Sets

    Huabing ZHU  Tony K.Y. CHAN  Lizhe WANG  Reginald C. JEGATHESE  

     
    PAPER-Distributed, Grid and P2P Computing

      Vol:
    E87-D No:7
      Page(s):
    1805-1812

    This paper presents a prototype of a distributed 3D rendering system in a hierarchical Grid environment. 3D rendering with massive data sets is a computationally intensive task. In order to make full use of computational resources on Grids, a hierarchical system architecture is designed to run over multiple clusters. This architecture involves both sort-first and sort-last parallel rendering algorithms to achieve excellent scalability, rendering performance and load balance.

  • Evaluation of Selective Rake Receiver in Direct Sequence Ultra Wideband Communications

    Mohammad Azizur RAHMAN  Shigenobu SASAKI  Jie ZHOU  Shogo MURAMATSU  Hisakazu KIKUCHI  

     
    LETTER-Mobile Communication

      Vol:
    E87-A No:7
      Page(s):
    1742-1746

    Performance of selective Rake (SRake) receiver is evaluated for direct sequence ultra wideband (DS-UWB) communications considering an independent Rayleigh channel having exponentially decaying power delay profile (PDP). BEP performances are shown. The results obtained are compared with similar results in a channel having flat PDP. Assumption of a flat PDP is found to predict the optimum spreading bandwidth to be lower and sub-optimum operating performance beyond optimum spreading bandwidth to be severely worse than that is achievable in a channel having exponentially decaying PDP by employing an SRake receiver having fixed number of combined paths. Optimum spreading bandwidth for SRake in a channel having exponentially decaying PDP is shown to be much larger than the one in a channel having flat PDP; that is specifically a good-news for UWB communications. Effects of partial band interference are also investigated. Interference is found to be less effective in exponentially decaying PDP.

  • Partition Timing Routing Protocol in Wireless Ad Hoc Networks

    Jen-Yi HUANG  Hsi-Han CHEN  Lung-Jen WANG  Chung-Hsien LIN  Wen-Shyong HSIEH  

     
    PAPER

      Vol:
    E87-D No:6
      Page(s):
    1433-1437

    Ad Hoc Networks are transmission networks in the structure of wireless networks that consist of many mobile hosts. They do so without the support from other communication infrastructures like Base Stations, and directly use wireless networks for data-transmission. This paper provides a general explanation of related protocols for setting up routes and their possible problems. In addition, related researches are described with their method of solving problems and reducing the possibility of problems occurring. Then, a novel constructive protocol called Partition-Timing Routing Protocol (PTR) is presented. If any covered node needs to transmit data to others outside the scope, it has to be managed by a core node. This protocol is able to adjust neighboring nodes covered in the scope, to select certain nodes to be their own core node. In addition, the timing for updating and adjusting the data of the covered scope is different from other methods, and at the same time it reduces the load of the entire network and makes it more flexible.

  • A Bipolar ECL Comparator for a 4 GS/s and 6-Bit Flash A-to-D Converter

    Shinya KAWADA  Yasuhiro SUGIMOTO  

     
    LETTER

      Vol:
    E87-C No:6
      Page(s):
    1022-1024

    A high-speed bipolar ECL comparator circuit with a latch is described. The spike noise generated by charging the base-to-emitter diffusion capacitor on the transition of differential transistors' switching in a sample-and-latch circuit is reduced by inserting the emitter degeneration resistors so that neither of them becomes completely cut off. The frequency bandwidth of a pre-amplifier is increased by using coupled inductors as differential loads. As a result, -3 dB frequency bandwidth of a pre-amplifier becomes 10 GHz, and 4 GS/s operation with 6-bit equivalent precision from a 3.3 V power supply is confirmed by the circuit simulation using device parameters from the 25 GHz silicon bipolar process.

  • Wearable Moment Display Device for Nonverbal Communications

    Hideyuki ANDO  Maki SUGIMOTO  Taro MAEDA  

     
    PAPER

      Vol:
    E87-D No:6
      Page(s):
    1354-1360

    There has recently been considerable interest in research on wearable non-grounded force display. However, there have been no developments for the communication of nonverbal information (ex. tennis and golf swing). We propose a small and lightweight wearable force display to present motion timing and direction. The display outputs a torque using rotational moment and mechanical brakes. We explain the principle of this device, and describe an actual measurement of the torque and torque sensitivity experiments.

  • A Novel Approach to Sampling the Coiled Tubing Surface with an Application for Monte Carlo Direct Lighting

    Chung-Ming WANG  Peng-Cheng WANG  

     
    PAPER-Computer Graphics

      Vol:
    E87-D No:6
      Page(s):
    1545-1553

    Sampling is important for many applications in research areas such as graphics, vision, and image processing. In this paper, we present a novel stratified sampling algorithm (SSA) for the coiled tubing surface with a given probability density function. The algorithm is developed from the inverse function of the integration for the areas of the coiled tubing surface. We exploit a Hierarchical Allocation Strategy (HAS) to preserve sample stratification when generating any desirable sample numbers. This permits us to reduce variances when applying our algorithm to Monte Carlo Direct Lighting for realistic image generation. We accelerate the sampling process using a segmentation technique in the integration domain. Our algorithm thus runs 324 orders of magnitude faster when using faster SSA algorithm where the order of the magnitude is proportional to the sample numbers. Finally, we employ a parabolic interpolation technique to decrease the average errors occurred for using the segmentation technique. This permits us to produce nearly constant average errors, independent of the sample numbers. The proposed algorithm is novel, efficient in computing and feasible for realistic image generation using Monte Carlo method.

  • High Speed Comparator with a Novel Swing Limiter

    Beaung-Woo LEE  Gyu-Hyeong CHO  

     
    LETTER-Electronic Circuits

      Vol:
    E87-C No:6
      Page(s):
    1085-1086

    The proposed comparator includes high gain preamplifier with a new swing limiter. It is shown that, for a given unity gain bandwidth, the high gain preamplifier of high output impedance can be made faster than the low gain one if properly combined with a high-speed low-level swing limiter.

  • A Study of Aspect Ratio of the Aperture and the Effect on Antenna Efficiency in Oversized Rectangular Slotted Waveguide Arrays

    Hisahiro KAI  Jiro HIROKAWA  Makoto ANDO  

     
    PAPER-Antenna and Propagation

      Vol:
    E87-B No:6
      Page(s):
    1623-1630

    A post-wall waveguide-fed parallel plate slotted array is an attractive candidate for high efficiency and mass producible planar array antennas for millimeter wave applications. For the slot design of this large sized array, a periodic boundary wall model based on the assumption of infinite array size and a parallel waveguide is used. In fact, the aperture is large but still finite (10-40 wavelength) and the TEM-like wave is perturbed due to the narrow walls at the periphery of the aperture as well as the slot coupling; antenna efficiency is affected by the size and the aspect ratio of the aperture. All these observations imply the unique defects of oversized waveguide arrays. In this paper, the aperture efficiency of post-wall waveguide arrays is assessed as a function of size and aspect ratio of the aperture for the first time, both in theory and measurement. An effective field analysis for an electrically large oversized waveguide array, developed by the author, is utilized for determining the slot excitation coefficients and aperture illumination. It is predicted that the oversized waveguide array has a potential efficiency of 80-90% if the aperture is larger than 18 wavelength on a side and the gain is more than 30 dBi. A transversely wide aperture generally provides higher efficiency than a longitudinally long aperture, provided a perfectly uniform TEM wave would be launched from the feed waveguide.

  • An Estimation Algorithm of Target Location and Scattered Waveforms for UWB Pulse Radar Systems

    Takuya SAKAMOTO  Toru SATO  

     
    PAPER-Sensing

      Vol:
    E87-B No:6
      Page(s):
    1631-1638

    Radars utilizing ultra-wide-band (UWB) pulses are attractive as an environment measurement method for various applications including household robots. Suitable filtering is essential for accurate ranging, which requires an accurate waveform estimation. This paper presents a high-resolution algorithm of estimating target location and scattered waveforms, whose accuracies are interdependent. The technique relies on iterative improvements of estimated waveforms. Description of the algorithm is followed by statistical simulation examples. The performance of the algorithm is contrasted with conventional ones and statistical bounds. Results indicate that our proposed algorithm has a remarkable performance, which is close to the theoretical limit. Next, we clarify the problem of applying HCT to multiple targets. HCT for multiple targets can not be used as an estimated waveform because of interference waves from other targets. We propose an interference suppression algorithm based on a neural network, and show an application example of the algorithm.

  • The Structures of CPW PHEMT's for Applications of Millimeter-Waves

    Byeong-Ok LIM  Tae-Shin KANG  Bok-Hyung LEE  Mun-Kyo LEE  Jin-Koo RHEE  

     
    PAPER

      Vol:
    E87-A No:6
      Page(s):
    1323-1329

    The parasitic capacitances induced in the spaces between an air-bridge interconnection and a drain pad (Cad), and between an air-bridge interconnection and a gate head (Cag) from a power CPW PHEMT are not negligible. In this paper, a modified equivalent circuit model for a CPW PHEMT and an improved CPW PHEMT for millimeter-wave applications are proposed. These were proved by measuring the fabricated CPW PHEMT and improved CPW PHEMT. These capacitances were confirmed by measuring the gate-source coupling using CPW PHEMT patterns without an active layer. From the measurements, the improved CPW PHEMT has the lowest coupling (loss) and the highest S21 gain among four different types tested at 60 GHz. And the improved CPW PHEMT is a feasible device which can be directly applied in millimeter-waves as a power device.

  • Bottles: A Transparent Interface as a Tribute to Mark Weiser

    Hiroshi ISHII  

     
    INVITED PAPER

      Vol:
    E87-D No:6
      Page(s):
    1299-1311

    This paper first discusses the misinterpretation of the concept of "ubiquitous computing" that Mark Weiser originally proposed in 1991. Weiser's main message was not the ubiquity of computers, but the transparency of interface that determines users' perception of digital technologies embedded in our physical environment seamlessly. To explore Weiser's philosophy of transparency in interfaces, this paper presents the design of an interface that uses glass bottles as "containers" and "controls" for digital information. The metaphor is a perfume bottle: Instead of scent, the bottles have been filled with music -- classical, jazz, and techno music. Opening each bottle releases the sound of a specific instrument accompanied by dynamic colored light. Physical manipulation of the bottles -- opening and closing -- is the primary mode of interaction for controlling their musical contents. The bottles illustrates Mark Weiser's vision of the transparent (or invisible) interface that weaves itself into the fabric of everyday life. The bottles also exploits the emotional aspects of glass bottles that are tangible and visual, and evoke the smell of perfume and the taste of exotic beverages. This paper describes the design goals of the bottle interface, the arrangement of musical content, the implementation of the wireless electromagnetic tag technology, and the feedback from users who have played with the system.

  • Improving TCP Performance over ATM-UBR with FED+ Scheme

    YoonTze CHIN  Shiro HANDA  Fumihito SASAMORI  Shinjiro OSHITA  

     
    PAPER-Switching

      Vol:
    E87-B No:6
      Page(s):
    1514-1523

    We had previously proposed a fuzzy logic-based buffer management scheme (BMS) called fuzzy early detection (FED), which was designed to improve transmission control protocol (TCP) performance over the unspecified bit rate (UBR) service of asynchronous transfer mode (ATM) networks. Since a weakness in FED was discovered later, we present a refined version of it named FED+ here. Maintaining the design architecture and the algorithm of FED, FED+ further adopts a specific per virtual connection accounting algorithm to achieve its design goals. The effects of TCP implementation, TCP maximum segment size, switch buffer size and network propagation delay on FED+ performance are studied through simulation. Its performance is then compared with those of pure early packet discard (EPD), P-random early detection (P-RED) and FED. Our evaluations show that FED+ is superior to the others if the issues of efficiency, fairness, robustness, buffer requirement and the ease of tuning control parameters of a BMS are considered collectively.

  • Transparent Gaze Communications for Multiparty Videoconference System

    Thitiporn LERTRUSDACHAKUL  Akinori TAGUCHI  Terumasa AOKI  Hiroshi YASUDA  

     
    PAPER

      Vol:
    E87-D No:6
      Page(s):
    1328-1337

    This paper addresses issues regarding to the development of teleconferencing support collaboration focusing on the realistic sensation domain. It argues that the gaze communications are the important mechanisms to enable visual channel and social presence in human-human communications. We propose a new aspect to establish multiple eye contacts and community awareness in multiparty videoconference (VC). The participants can aware of being recognized from any remote sites while they are talking with each other. Community awareness means the ability to aware of group communication in the videoconference. The participant can recognize of who is talking with whom and any communicative groups in a conference. An intelligent image arrangement through a unique position of camera is built and simulated. The systematic placement of images serves the gaze communications by utilizing the characteristic of gaze direction and image's position. The experimental results show that the proposed approach has the significant improvement in the interpersonal communication compared with the conventional VC system.

  • Implementation of a Multi-Class Fair Queueing via Identification of the QoS-Aware Parameters

    Daein JEONG  Byeongseog CHOE  

     
    PAPER-Switching

      Vol:
    E87-B No:6
      Page(s):
    1524-1534

    This paper proposes a novel method of identifying the design parameters for a practical implementation of the fair queueing discipline, which is capable of class-level delay control. The notion of class weight is introduced at first, and then the session weights are determined. This two-phase approach is favorable in terms of the scalability;that is, the overall complexity is dependent upon the number of classes only. We propose a packet scheduler referred to as the DPS (Delay-centric Processor Sharing) scheme which employs those design parameters to deliver class-wise delay bound services. The associated admission policy for delay guarantee is also derived. System analysis and derivation of the parameters have their origins in the understanding of the so-called system equation, which describes the dynamics of the class-level service share. The proposed design parameters are QoS-aware in that they are consistently refined depending on the system status. Several numerical and simulation results show that the DPS scheme is advantageous over other ones in terms of both resource efficiency and the robustness. Concerning the scalability, we show that an alternative tagging process of the DPS scheme is implementable with O(1) complexity with no significant degradation in delay performance.

  • Performance Evaluation Method of Bit-Interleaved Turbo Trellis-Coded Modulation and Its Optimization

    Novianto FAJAR  Haruo OGIWARA  

     
    PAPER-Coding Theory

      Vol:
    E87-A No:6
      Page(s):
    1583-1590

    For an additive white Gaussian noise (AWGN) channel, a performance evaluation of parallel concatenated turbo trellis-coded modulation (turbo TCM) using bit-interleavers is reported. By obtaining weight distribution, the performance is evaluated by using a union bound method. Comparison between the result of evaluated performance and simulation results is shown, and the usefulness of the evaluated performance is shown. An optimum code and an optimum mapping are sought. The result of the optimum code with the optimum mapping is a new interleaver size N dependency which is proportional to N-3. It is better than the interleaver size dependency for Benedetto code with the natural mapping which is proportional to N-1. The reasons why these dependencies can happen are also discussed.

  • A Target Shape Estimation Algorithm for Pulse Radar Systems Based on Boundary Scattering Transform

    Takuya SAKAMOTO  Toru SATO  

     
    PAPER-Sensing

      Vol:
    E87-B No:5
      Page(s):
    1357-1365

    Environment measurement is an important issue for various applications including household robots. Pulse radars are promising candidates in a near future. Estimating target shapes using waveform data, which we obtain by scanning an omni-directional antenna, is known as one of ill-posed inverse problems. Parametric methods such as Model-fitting method have problems concerning calculation time and stability. We propose a non-parametric algorithm for high-resolution estimation of target shapes in order to solve the problems of parametric algorithms.

  • 40-Gbit/s 16-bit Burst Optical Packet Generator Based on Photonic Parallel-to-Serial Conversion

    Hirokazu TAKENOUCHI  Kiyoto TAKAHATA  Tatsushi NAKAHARA  Ryo TAKAHASHI  Hiroyuki SUZUKI  

     
    LETTER-Optoelectronics

      Vol:
    E87-C No:5
      Page(s):
    825-827

    We propose a burst optical packet generator based on a novel photonic parallel-to-serial conversion scheme, and demonstrate 40-Gbit/s 16-bit optical packet generation from 16-ch parallel low-voltage TTL data streams. It consists of electrical 4:1 parallel-to-serial converters that employ InP metal-semiconductor-metal photodetectors, and an optical time-domain multiplexer with electroabsorption modulators. The proposed optical packet generator is suitable for burst optical packet generation and overcomes the electronic bandwidth limitation, which is prerequisite for achieving high-speed photonic packet switched networks. In addition, it can be driven by simple low-cost low-power CMOS logic circuits, and is compact and extensible in terms of the number of input channels due to the effective combination of electrical and optical multiplexing.

1741-1760hit(2741hit)