This paper presents the development of a sound–specific vibration interface and its evaluation results by playing three commercial games with the interface. The proposed interface complements the pitfalls of existing frequency–based vibration interfaces such as vibrating headsets, mouses, and joysticks. Those interfaces may bring negative user experiences by generating incessant vibrations because they vibrate in response to certain sound frequencies. But the proposed interface which responds to only target sounds can improve user experiences effectively. The hardware and software parts of the interface are described; the structure and the implementation of a wrist pad that delivers vibration are discussed. Furthermore, we explain a sound-matching algorithm that extracts sound characteristics and a GUI-based pattern editor that helps users to design vibration patterns. The results from evaluating the performance show that the success ratio of the sound matching is over 90% at the volume of 20 dB and the delay time is around 400 msec. In the survey about user experiences, the users evaluates that the interface is more than four times effective in improving the reality of game playing than without using the vibration interfaces, and two times than the frequency–based ones.

A novel divide-by-3 injection-locked frequency divider (ILFD) is proposed. The ILFD circuit is realized with a cross-coupled n-core MOS LC-tank oscillator embedded with a push-push signal generator and two injection MOSFETs for coupling the injection signal into the resonator. The ILFD uses the linear mixer to extend the locking range and has been implemented in a standard 0.18 µm CMOS process. The core power consumption of the ILFD core is 3.12 mW. The divider's free-running frequency is tunable from 4.26 GHz to 4.9 GHz by tuning the varactor's control bias, and at the incident power of 0 dBm the locking range of the ILFD used as a divide-by-3 divider is 1.5 GHz, from 12.5 GHz to 14.0 GHz.

In this letter, we propose a new construction of quaternary low correlation zone (LCZ) sequence set using binary LCZ sequence sets and an inverse Gray mapping. The new construction method provides optimal quaternary LCZ sequence sets even if the employed binary LCZ sequence set is suboptimal. The optimality is improved at the price of alphabet extension.

We consider a queuing model with applications to electric vehicle (EV) charging systems in smart grids. We adopt a scheme where an Electric Service Company (ESCo) broadcasts a one bit signal to EVs, possibly indicating 'on-peak' periods during which electricity cost is high. EVs randomly suspend/resume charging based on the signal. To model the dynamics of EVs we propose an M/M/∞ queue with random interruptions, and analyze the dynamics using time-scale decomposition. There exists a trade-off: one may postpone charging activity to 'off-peak' periods during which electricity cost is cheaper, however this incurs extra delay in completion of charging. Using our model we characterize achievable trade-offs between the mean cost and delay perceived by users. Next we consider a scenario where EVs respond to the signal based on the individual loads. Simulation results show that peak electricity demand can be reduced if EVs carrying higher loads are less sensitive to the signal.

This paper presents a current-reused quadrature voltage-controlled oscillator (QVCO) which adopts a source-connection coupling structure. The QVCO simultaneously achieves low phase noise and low power consumption by newly combining current-reused VCOs and coupling transistors. The measured QVCO obtains good FoM of -188.2 dBc at a frequency of 2.2 GHz with 3.96 mW power consumption.

We analyze subjective assessments by comparative evaluations of bulk data transmission by using two psychological methods (the method of successive categories and the constant method). From the results of the first experiment, the thresholds at which participants downloading a data file began to feel dissatisfaction with service degradation are 15.7 Mbps and 11.6 Mbps obtained by the two different methods when the throughput without the service degradation is approximately 22 Mbps. In the second experiment, we investigate the threshold of user satisfaction for various network environments. The threshold is 63% of the throughput of the user's usual network environment. Moreover, from the viewpoint of download time, users feel dissatisfaction with the quality when download time becomes 1.5 times longer. These values can be used to more effectively allocate network resources and thereby achieve higher service quality.

In this paper, a new power control scheme is proposed to maximize the network throughput with fairness provisioning. Based on the Stackelberg game model, the proposed scheme consists of two control mechanisms; user-level and system-level mechanisms. Control decisions in each mechanism act cooperatively and collaborate with each other to satisfy efficiency and fairness requirements. Simulation results demonstrate that the proposed scheme has excellent network performance, while other schemes cannot offer such an attractive performance balance.

In this paper, a new construction method of quaternary sequences of even period 2N having the ideal autocorrelation and balance properties is proposed. These quaternary sequences are constructed by applying the inverse Gray mapping to binary sequences of odd period N with the ideal autocorrelation. Autocorrelation distribution of the proposed quaternary sequences is derived. These sequences can be used to construct quaternary sequence families of even period 2N. Family size and the maximum absolute value of correlation spectrum of the proposed quaternary sequence families are also derived.

A 0.8-V CMOS Phase-Locked Loop (PLL) has been designed and fabricated by using a 0.13-µm 1p8m CMOS process. In the proposed PLL, the double-positive-feedbacks voltage-controlled oscillator (DPF-VCO) is used to generate current signals for the coupling current-mode injection-locked frequency divider (CCMILFD) and current-injection current-mode logic (CICML) divider. A short-pulsed-reset phase frequency detector (SPR-PFD) with the reduced pulse width of reset signal to improve the linear range of the PFD and a complementary-type charge pump to eliminate the current path delay are also adopted in the proposed PLL. The measured in-band phase noise of the fabricated PLL is -98 dBc/Hz. The locking range of the PLL is from 22.6 GHz to 23.3 GHz and the reference spur level is -69 dBm that is 54 dB bellow the carrier. The power consumption is 9.2 mW under a 0.8-V power supply. The proposed PLL has the advantages of low phase noise, low reference spur, and low power dissipation at low voltage operation.

This paper proposes a new resource allocation algorithm for uplink OFDMA-based cooperative relay networks, assuming multiple user nodes, multiple relay nodes and a single destination. The aim is to maximise the total sum of the users' data rates, while guaranteeing fairness among them with different QoS requirements. Assuming perfect channel state information (CSI) at the resource allocation controller, the optimisation problem is formulated such that each user is assigned a weight factor based on its QoS requirements. The ones with higher weights are given higher priorities to select their resources (relay stations and subcarriers) first. Once the required QoS is achieved for all users, the weight factor for all users is reduced to a small uniform value. The remaining resources are then allocated to the users with higher instantaneous rates in order of magnitude. The results show that the proposed algorithm outperforms the greedy and static algorithms in terms of outage probability and fairness, and at the same time outperforms Jeong's algorithm by 58% in terms of total sum rate, with an average 74% reduction in system complexity.

This paper presents a new low-dropout (LDO) regulator with low-quiescent, high-drive and fast-transient performance. This is based on a new composite power transistor composed of a shunt feedback class-AB embedded gain stage and the application of dynamic-biasing schemes to both the error amplifier as well as the composite power transistor. The proposed LDO regulator has been simulated and validated using BSIM3 models and GLOBALFOUNDRIES 0.18-µm CMOS process. The simulation results have shown that the LDO regulator consumes 4.7 µA quiescent current at no load, regulating the output at 1 V from a minimum 1.2 V supply. It is able to deliver up to 450 mA load current with a dropout of 200 mV. It can be stabilized using a 4.7 µF output capacitor with a 0.1 Ω ESR resistor. The maximum transient output voltage is 64.6 mV on the basis of a load step change of 450 mA/10 ns under typical condition. The full load transient response is less than 350 ns.

Regularization plays a fundamental role in adaptive filtering. There are, very likely, many different ways to regularize an adaptive filter. In this letter, we propose one possible way to do it based on a condition that makes intuitively sense. From this condition, we show how to regularize the recursive least-squares (RLS) algorithm.

A dual-band divide-by-2 quadrature injection-locked frequency divider (QILFD) is proposed to achieve high-speed, low power, wide-locking range, and accurate quadrature output phases. The QILFD consists of two dual-resonance differential voltage controlled oscillators and four coupling NMOS injectors in a ring configuration. The injectors are used as coupling devices of two differential ILFDs and are also used as common source amplifiers. The proposed QILFD has been implemented with the TSMC 90 nm CMOS technology and the core power consumption is 2.31 mW at the dc drain-source bias of 0.5 V. At the input power of 0 dBm, the low-band and high-band divide-by-2 operation ranges are respectively from 7.0 GHz to 10.1 GHz and 19.8 GHz to 24.6 GHz.

Recently, Yu, Gong and Tang found new constructions of binary sequences of period 4N with optimal autocorrelation magnitude by different interleaved structure of sequences and sequences which had special correlation property, respectively. In this paper, we derive more results on binary sequences of period 4N which also have optimal autocorrelation.

We present the recovery of 2.5 Gb/s synchronous 16-point quadrature amplitude modulation data in real-time for an linewidth-times-symbol-duration ratio of 0.00048 after transmission over 1.6 km standard single mode fiber.

Most existing works on resource allocation in cooperative OFDMA systems have focused on homogeneous users with same service and demand. In this paper, we focus on resource allocation in a service differentiated cooperative OFDMA system where each user has a different QoS requirement. We investigate joint power allocation, relay selection and subcarrier assignment to maximize overall system rates with consideration of QoS guarantees and service support. By introducing QoS price, this combinatorial problem with exponential complexity is converted into a convex one, and a two-level dual-primal decomposition based QoS-aware resource allocation (QARA) algorithm is proposed to tackle the problem. Simulation results reveal that our proposed algorithm significantly outperforms previous works in terms of both services support and QoS satisfaction.

In this letter, a novel adaptive total variation (ATV) model is proposed for image inpainting. The classical TV model is a partial differential equation (PDE)-based technique. While the TV model can preserve the image edges well, it has some drawbacks, such as staircase effect in the inpainted image and slow convergence rate. By analyzing the diffusion mechanism of TV model and introducing a new edge detection operator named difference curvature, we propose a novel ATV inpainting model. The proposed ATV model can diffuse the image information smoothly and quickly, namely, this model not only eliminates the staircase effect but also accelerates the convergence rate. Experimental results demonstrate the effectiveness of the proposed scheme.

Since the release of human genome sequences, one of the most important research issues is about indexing the genome sequences, and the suffix tree is most widely adopted for that purpose. The traditional suffix tree construction algorithms suffer from severe performance degradation due to the memory bottleneck problem. The recent disk-based algorithms also provide limited performance improvement due to random disk accesses. Moreover, they do not fully utilize the recent CPUs with multiple cores. In this paper, we propose a fast algorithm based on `divide-and-conquer' strategy for indexing the human genome sequences. Our algorithm nearly eliminates random disk accesses by accessing the disk in the unit of contiguous chunks. In addition, our algorithm fully utilizes the multi-core CPUs by dividing the genome sequences into multiple partitions and then assigning each partition to a different core for parallel processing. Experimental results show that our algorithm outperforms the previous fastest DIGEST algorithm by up to 10.5 times.

We demonstrate high baud-rate DQPSK modulation with full-ETDM technique using a novel high-speed optical IQ modulator consisting of a ridge-type optical waveguide structure on a thin LiNbO3 substrate. Our fabrication technique achieves a drastic extension of the modulator's bandwidth and a reduction of half-wave voltage. Demonstration of 90-Gbaud NRZ-DP-DQPSK signal generation with the modulator successfully achieved a bit rate of 360-Gb/s under full-ETDM configuration.

In this paper, a preemptive priority queueing model is developed to derive the system dwelling time of secondary calls in a cognitive radio system in which a primary call's reoccupation of the channel is modeled as a preemptive event that forces a secondary call to attempt a spectrum handover. The suspension of secondary call service which may happen when the immediate spectrum handover fails, is included in our computation of the system dwelling time. The results are helpful in evaluating cognitive radio systems in terms of service delay and in determining system design parameters such as required buffer size and system capacity.