Burn-in is a widely used method to improve the quality of products or systems after they have been produced. In this paper, optimal burn-in procedures for a system with two types of failures (i.e., minor and catastrophic failures) are investigated. A new system surviving burn-in time b is put into field operation and the system is used under a warranty policy under which the manufacturer agrees to provide a replacement system for any system that fails to achieve a lifetime of at least w. Upper bounds for optimal burn-in time minimizing the total expected warranty cost are obtained under a more general assumption on the shape of the failure rate function which includes the bathtub shaped failure rate function as a special case.

A single-electron turnstile and electrometer circuit was fabricated on a silicon-on-insulator substrate. The turnstile, which is operated by opening and closing two metal-oxide-semiconductor field-effect transistors (MOSFETs) alternately, allows current quantization at 20 K due to single-electron transfer. Another MOSFET is placed at the drain side of the turnstile to form an electron storage island. Therefore, one-by-one electron entrance into the storage island from the turnstile can be detected as an abrupt change in the current of the electrometer, which is placed near the storage island and electrically coupled to it. The correspondence between the quantized current and the single-electron counting was confirmed.

Let G be any graph with property P (for example, general graph, directed graph, etc.) and S be nonnegative and non-decreasing integer sequence(s). The prescribed degree sequence problem is a problem to determine whether there is a graph G having S as the prescribed sequence(s) of degrees or outdegrees of the vertices. From 1950's, P has attracted wide attentions, and its many extensions have been considered. Let P be the property satisfying the following (1) and (2):(1) G is a directed graph with two disjoint vertex sets A and B. (2) There are r11 (r22, respectively) directed edges between every pair of vertices in A(B), and r12 directed edges between every pair of vertex in A and vertex in B. Then G is called an (r11, r12, r22)-tournament ("tournament", for short). The problem is called the score sequence pair problem of a "tournament" (realizable, for short). S is called a score sequence pair of a "tournament" if the answer of the problem is "yes." In this paper, we propose the characterizations of a score sequence pair of a "tournament" and an algorithm for determining in linear time whether a pair of two integer sequences is realizable or not.

In this paper, we propose an algorithm that solves the node-to-node disjoint paths problem in n-burnt pancake graphs in polynomial-order time of n. We also give a proof of its correctness as well as the estimates of time complexity O(n3) and the maximum path length 3n+4. We conducted a computer experiment for n=2 to 100 to measure the average performance of our algorithm. The results show that the average time complexity is O(n3.0) and the maximum path length is 3n+4.

In this paper, we present a resource monitoring and selection method for rapid turnaround grid applications (for example, within 10 seconds). The novelty of our method is the distributed evaluation of resources for rapidly selecting the appropriate idle resources. We integrate our method with a widely used resource management system, namely the Monitoring and Discovery System 2 (MDS2), and compare our method with the original MDS2 in terms of the performance and the scalability. The performance is measured using a 64-node cluster of PCs and the scalability is analyzed using a theoretical model and the measured performance. The experimental results show that our method reduces the resource selection time by 82%, as compared with the original MDS2. The scalability analysis also indicates that our method can keep the resource selection time within 1 second, up to 500 nodes in local-area-network (LAN) environments. In addition, some simulation results are presented to estimate the impact of our method for wide-area-network (WAN) environments.

Among the broadband wireless communication standards utilized to satisfy the demand for multimedia services, time division duplexing (TDD) is satisfactory for the asymmetric data transmission emphasized in Internet services. In this system, the transition between receiving a frame and transmitting a response must be bounded for an effective use of radio resources. However, the minimized inter-frame space-time requires high processing power. The aim of the present paper is to gain insight into the time latency at the turn-around time of a TDD operation. We also propose a simplified new processor, which is a terminal device-friendly architecture that includes prediction and preparation to support processing of burst-type traffic.

In this letter, a new addressing scheme for hexagonal networks is proposed. Using the new addressing scheme, many routing algorithms designed for networks using square-based topologies such as mesh and torus can also be applied to hexagonal networks. Methods of applying the turn model to hexagonal networks are derived, with some new minimal and partial adaptive routing algorithms obtained. Simulations of the new routing algorithms under different working conditions are carried on hexagonal networks of various sizes. The results show that the proposed algorithms can offer lower packet delay and loss rate than the popular dimension order routing algorithm.

The effect of the power/ground plane on the through-hole signal via is analyzed in a viewpoint of a band-stop filter. When the through-hole signal via passes through the power/ground plane, the return current path discontinuity of the through-hole signal via occurs due to the high impedance of the power/ground plane. Since the high impedance is produced by the power/ground plane resonance, it acts as a band-stop filter, which is connected to the signal trace in series. Therefore, the power/ground plane filters off its resonance frequency component by absorbing and reflecting from the signal on the through-hole signal via, and consequently the signal distortion, the power/ground plane noise voltage, and the consequent radiated emission occur. With S-parameter and TDR-TDT measurements, the band-stop effect of the power/ground plane on the through-hole signal via is confirmed. And then, this analysis is applied to the clock transmission through the through-hole signal via to obtain the clearer confirmation. The measurements of the distorted clock waveforms, the induced power/ground plane noise voltages, and the radiated emissions depending on the power/ground plane impedance around the through-hole signal via are shown.

In this paper the spectral density of the additive jitter noise in continuous time (CT) Delta-Sigma modulators (DSM) is derived analytically. Making use of the analytic results, extracted in this paper, a novel method for elimination of the damaging effects of the clock jitter in continuous time Delta-Sigma modulators is proposed. In this method instead of the conventional waveforms used in the feedback path of CT DSM's such as the non return to-zero, the return to-zero, and the half delay return to-zero, an impulse waveform is employed.

This paper studies the electromagnetic field radiated by a return stroke, considering even the case of a direct lightning on an aircraft, in the Fraunhofer region. The work here presented is an analysis of a complete discharge case, considering the electric field due to some charged clouds, the presence of a conductive airplane immersed in this external electric field, the channels related to the lightning paths, and the interactions of the field due to the lightning return stroke with a far field located victim system. It could be divided in several steps. Firstly, the cloud-generated electric field has been calculated, and a particular model of the clouds has been introduced. For what concerns the geometrical considerations, a Koch's snowflake shaped cloud has been chosen, in order to achieve a complex geometrical model. To better fit this model with the reality a non-symmetric cloud has been created. Then, a simple aircraft model, according to those reported in literature, has been introduced. The conductive structure of the aircraft interacts with the atmospheric electric field and modifies its distribution. Furthermore, applying a boundary panel method, frequently used in subsonic incompressible aerodynamics, Laplace's equation for the electrostatic potential in the considered domain has been computed, taking into account the presence of the metallic structure. Finally, the inception points on the outer surface of the aircraft are calculated and highlighted. Beginning from those points, in which the probability of discharge is higher, a suitable lightning channel has been created, and the shape of the jagged field signal has been correlated to the tortuous path discharge, even considering the presence of branches. The total electric field given by the first discharge from the cloud to the airplane, by the second discharge from the aircraft to the ground and by the current flowing along the fuselage has been computed and calculated in a far field located observation point.

Leakage power is predicted to become dominant in the total operation power as the transistor technology gets advanced. Even in the current technology, dramatic increase of leakage power at elevated temperature is a big problem. Burn-in testing, which is typically performed at 125, is facing at difficulties such as throughput degradation or thermal runaway due to increase of leakage power. Reducing leakage power at operation time is essential to solve these problems. We propose a novel approach to make use of an enable signal of a gated-clock technique for reducing active leakage power. A sleep transistor is provided between combinational logic circuits and the ground, and is controlled by the enable signal. When state transitions do not occur in Finite-State-Machines (FSM's), the enable signal becomes low and the state flip-flops keep the data. At the same time, the sleep transistor is turned off so that combinational logic gates are electrically disconnected from the ground to reduce leakage. Simulation results have shown that the proposed scheme reduces active leakage power by 30-60% in 0.18 µm technology. The total power was reduced by 20% at the maximum at 125. It was also found that performance degradation was tolerable for burn-in testing.

This letter proposes a low-power tournament branch predictor, in which the number of accesses to the branch predictors (local predictor or global predictor) is reduced. Analysis results with Samsung Memory Compiler show that the proposed branch predictor reduces the power consumption by 24-45%, compared to the conventional tournament branch predictor, not requiring any additional storage arrays, not incurring any additional delay and never harming accuracy.

DualFS is a next-generation journaling file system which has the same consistency guaranties as traditional journaling file systems but better performance. This paper introduces three new enhancements which significantly improve DualFS performance during normal operation, and presents different experimental results which compare DualFS and other traditional file systems, namely, Ext2, Ext3, XFS, JFS, and ReiserFS. The experiments carried out prove, for the first time, that a new file system design based on separation of data and metadata can significantly improve file systems' performance without requiring several storage devices.

A burnt pancake graph is a variant of Cayley graphs and its topology is suitable for massively parallel systems. However, for a burnt pancake graph, there is much room for further research. Hence, in this study, we focus on n-burnt pancake graphs and propose an algorithm to obtain n disjoint paths from a source node to n destination nodes in polynomial order time of n, n being the degree of the graph. In addition, we estimate the time complexity of the algorithm and the sum of path lengths. We also give a proof of correctness of the algorithm. Moreover, we report the results of computer simulation to evaluate the average performance of the algorithm.

This paper proposes a 10 µm thick oxide layer structure, which can be used as a substrate for RF circuits. The structure has been fabricated by anodic reaction and complex oxidation, which is a combined process of low temperature thermal oxidation (500, for 1 hr at H2O/O2) and a rapid thermal oxidation (RTO) process (1050, for 1 min). The electrical characteristics of oxidized porous silicon layer (OPSL) were almost the same as those of standard thermal silicon dioxide. The leakage current through the OPSL of 10 µm was about 100-500 pA in the range of 0 V to 50 V. The average value of breakdown field was about 3.9 MV/cm. From the X-ray photo-electron spectroscopy (XPS) analysis, surface and internal oxide films of OPSL, prepared by complex process, were confirmed to be completely oxidized. Also the role of RTO was important for the densification of the porous silicon layer (PSL), oxidized at a lower temperature. For the RF test of Si substrate, with thick silicon dioxide layer, we have fabricated high performance passive devices such as coplanar waveguide (CPW) on OPSL substrate. The insertion loss of CPW on OPSL prepared by complex oxidation process was -0.39 dB at 4 GHz and similar to that of CPW on OPSL prepared at a temperature of 1050 (1 hr at H2O/O2). Also the return loss of CPW on OPSL prepared by complex oxidation process was -23 dB at 10 GHz which is similar to that of CPW on OPSL prepared by high temperature oxidation.

In provisioning packet data service on wireless cellular networks, a scheme of altering connection status between mobile and base stations appeared with an effort to utilize resource during idle periods. A critical issue in such scheme of sojourn and transition on the connection states is to determine a maximum time to sojourn at each state. An excessive sojourn time leads to resource invasion by inactive stations, while a high cost of re-establishing connection components is imposed by an insufficient sojourn. Thus, the maximum sojourn times must be optimized in consideration of the two conflicting arguments. In this paper, we consider a generic scheme of connection status transitions and formulate a decision problem to determine maximum sojourn times by introducing a loss function which reflects the cost of connection re-establishment as well as the loss induced by inefficient resource usage. From the decision problem, we derive an optimal value for maximum sojourn time, identified as Bayes rule, by observing the delay time of last packet to have posterior information about the length of upcoming idle period. From the analytical results, we show the Bayes sojourn time is trivial under a constraint on loss coefficients when packet arrivals follow a Poisson process.

CDMA is considered a suitable access control for wireless multimedia communication systems. In this paper, we present an access scheme for packet-typed wireless networks, called PRMA/URN (Packet Reservation Multiple Access/URN) for the CDMA environment. This protocol combines URN algorithm with PRMA, instead of slotted-ALOHA. Also, we introduce enhanced access control into PRMA/URN for effective transmission of multimedia information, i.e. voice and data information. The enhanced access control has two characteristics. First, voice mobile terminals have priority in the initial access. Second, data mobile terminals can transmit packets continuously if necessary. We carry out the performance comparisons for CDMA environments between PRMA, PRMA/URN and PRMA/URN with enhanced access control, and show numerically the effectiveness of PRMA/URN with enhanced access control.

Sports scheduling concerns how to construct a schedule of a sports competition mathematically. Many sports competitions are held as round-robin tournaments. In this paper, we consider a particular class of round-robin tournaments. We report some properties of round-robin tournaments and enumerate home-away tables satisfying some practical requirements by computer search.

A number of studies have recently been published concerning chaotic neuron models and asynchronous neural networks having chaotic neuron models. In the case of large-scale neural networks having chaotic neuron models, the neural network should be constructed using analog hardware, rather than by computer simulation via software, due to the high speed and high integration of analog circuits. In the present study, we discuss the circuit structure of a chaotic neuron model, which is constructed on the basis of the mathematical model of an asynchronous chaotic neuron. We show that the pulse-type hardware chaotic neuron model can be constructed on the basis of the mathematical model of an asynchronous chaotic neuron. The proposed model is an effective model for the cell body section of the pulse-type hardware chaotic neuron model for ICs. In addition, we show the bifurcation structure of our composed model, and discuss the bifurcation routes and return maps thereof.

In this paper, we review recent developments in the field of optical regeneration for both ultra long-haul transmission and terrestrial networking applications. Different techniques (2R/3R) using nonlinear properties of materials and/or devices are proposed such as saturable absorber or InP based interferometer structures showing regenerative capabilities. Principles of operation as well as system experiments are described.