Periodic-finite-type shifts (PFT's) are sofic shifts which forbid the appearance of finitely many pre-specified words in a periodic manner. The class of PFT's strictly includes the class of shifts of finite type (SFT's). The zeta function of a PFT is a generating function for the number of periodic sequences in the shift. For a general sofic shift, there exists a formula, attributed to Manning and Bowen, which computes the zeta function of the shift from certain auxiliary graphs constructed from a presentation of the shift. In this paper, we derive an interesting alternative formula computable from certain “word-based graphs” constructed from the periodically-forbidden word description of the PFT. The advantages of our formula over the Manning-Bowen formula are discussed.

Scale Invariant Feature Transform (SIFT) algorithm is a very excellent approach for feature detection. It is characterized by data intensive computation. The current studies of accelerating SIFT algorithm are mainly reflected in three aspects: optimizing the parallel parts of the algorithm based on general-purpose multi-core processors, designing the customized multi-core processor dedicated for SIFT, and implementing it based on the FPGA platform. The real-time performance of SIFT has been highly improved. However, the factors such as the input image size, the number of octaves and scale factors in the SIFT algorithm are restricted for some solutions, the flexibility that ensures the high execution performance under variable factors should be improved. This paper proposes a reconfigurable solution to solve this problem. We fully exploit the algorithm and adopt several techniques, such as full parallel execution, block computation and CORDIC transformation, etc., to improve the execution efficiency on a REconfigurable MUltimedia System called REMUS. Experimental results show that the execution performance of the SIFT is improved by 33%, 50% and 8 times comparing with that executed in the multi-core platform, FPGA and ASIC separately. The scheme of dynamic reconfiguration in this work can configure the circuits to meet the computation requirements under different input image size, different number of octaves and scale factors in the process of computing.

We present a multi-channel sampling expansion for signals with selectively tiled band-region. From this we derive an oversampling expansion for any bandpass signal, and show that any finitely many missing samples from two-channel oversampling expansion can always be uniquely recovered. In addition, we find a sufficient condition under which some infinitely many missing samples can be recovered. Numerical stability of the recovery process is also discussed in terms of the oversampling rate and distribution of the missing samples.

Recently, multi-core processors are used in embedded systems very often. Since application programs is much limited running on embedded systems, there must exists an optimal cache memory configuration in terms of power and area. Simulating application programs on various cache configurations is one of the best options to determine the optimal one. Multi-core cache configuration simulation, however, is much more complicated and takes much more time than single-core cache configuration simulation. In this paper, we propose a very fast dual-core L1 cache configuration simulation algorithm. We first propose a new data structure where just a single data structure represents two or more multi-core cache configurations with different cache associativities. After that, we propose a new multi-core cache configuration simulation algorithm using our new data structure associated with new theorems. Experimental results demonstrate that our algorithm obtains exact simulation results but runs 20 times faster than a conventional approach.

In the recent LSI design, it is difficult to obtain a placement which satisfies both design constraints and specifications due to the increase of the circuit size, the progress of the manufacturing technology, and the speed-up of the circuit performance. Analytical placement methods are promising to obtain the placement which satisfies both design constraints and specifications. Although existing analytical placement methods obtain the placement with the short wire length, the obtained placement has overlap. In this paper, we propose Overlap Removable Area as an overlap evaluation method for an analytical placement method. Experiments show that the proposed evaluation method is effective for removing overlap in the analytical placement method.

This paper presents the stability analysis for continuous-time Takagi-Sugeno fuzzy systems using a fuzzy Lyapunov function. The proposed fuzzy Lyapunov function involves the time derivatives of states to include new free matrices in the LMI stability conditions. These free matrices extend the solution space for Linear Matrix Inequalities (LMIs) problems. Numerical examples illustrate the effectiveness of the proposed methods.

This paper proposes an adaptation method for structuring elements of morphological filters. A structuring element of a morphological filter specifies a shape of local structures that is eliminated or preserved in the output. The adaptation of the structuring element is hence a crucial problem for image denoising using morphological filters. Existing adaptation methods for structuring elements require preliminary training using example images. We propose an adaptation method for structuring elements of morphological opening filters that does not require such training. In our approach, the opening filter is interpreted as an approximation method with the union of the structuring elements. In order to eliminate noise components, a penalty defined from an assumption of image smoothness is imposed on the structuring element. Image denoising is achieved through decreasing the objective function, which is the sum of an approximation error term and the penalty function. In experiments, we use the proposed method to demonstrate positive impulsive noise reduction from images.

This paper describes the design of an interpolated pipeline analog-to-digital converter (ADC). By introducing the interpolation technique into the conventional pipeline topology, it becomes possible to realize a more than 10-bits resolution and several hundred MS/s ADC using low-gain open-loop amplifiers without any multiplying digital-to-analog converter (MDAC) calibration. In this paper, linearity requirement of the amplifier is analyzed with the relation of reference range and stage resolution first. Noise characteristic is also discussed with amplifier's noise bandwidth and load capacitance. After that, sampling speed and SNR characteristic are examined with various amplifier currents. Next, the resolution optimization of the pipeline stage is discussed based on the power consumption. Through the analysis, reasonable parameters for the amplifier can be defined, such as transconductance, source degeneration resistance and load capacitance. Also, optimized operating speed and stage resolution for interpolated pipelined ADC is shown. The analysis in this paper is valuable to both the design of interpolated pipeline ADCs and other circuits which incorporate interpolation and amplifiers.

In recent years, heterogeneous cellular network (HetNet) topology has been attracting much attention. HetNet, which is a network topology with low power base stations installed inside the cell range of conventional macrocells, can realize network capacity enhancement through the effects of macrocell offloading and cell shrinkage. Due to the heterogeneity nature of HetNet, network designers should carefully consider about the interference management, resource allocation, user association and cell range expansion. These issues have been well studied in recent literatures. However, one of the important problems which has not been well investigated in conventional works is the base station (BS) deployment problem in HetNet. This paper investigates the optimal pico base station deployment in heterogeneous cellular networks especially with the existence of hotspots. In this paper, pico BS locations are optimized together with other network parameters including spectrum splitting ratio and signal-to-interference-noise ratio (SINR) bias for cell range expansion to maximize the total system rate, by considering two spectrum allocation strategies, i.e. spectrum overlapping and spectrum splitting. Numerical results show that the optimized pico BS locations can improve the system rate, the average user rate and outage user rate in HetNet with hotspots.

Super resolution (SR) reconstruction is the process of fusing a sequence of low-resolution images into one high-resolution image. Many researchers have introduced various SR reconstruction methods. However, these traditional methods are limited in the extent to which they allow recovery of high-frequency information. Moreover, due to the self-similarity of face images, most of the facial SR algorithms are machine learning based. In this paper, we introduce a facial SR algorithm that combines learning-based and regularized SR image reconstruction algorithms. Our conception involves two main ideas. First, we employ separated frequency components to reconstruct high-resolution images. In addition, we separate the region of the training face image. These approaches can help to recover high-frequency information. In our experiments, we demonstrate the effectiveness of these ideas.

Recently, probabilistic topic models have been applied to various types of data, including text, and their effectiveness has been demonstrated. Latent Dirichlet allocation (LDA) is a well known topic model. Variational Bayesian inference or collapsed Gibbs sampling is often used to estimate parameters in LDA; however, these inference methods incur high computational cost for large-scale data. Therefore, highly efficient technology is needed for this purpose. We use parallel computation technology for efficient collapsed Gibbs sampling inference for LDA. We assume a symmetric multiprocessing (SMP) cluster, which has been widely used in recent years. In prior work on parallel inference for LDA, either MPI or OpenMP has often been used alone. For an SMP cluster, however, it is more suitable to adopt hybrid parallelization that uses message passing for communication between SMP nodes and loop directives for parallelization within each SMP node. We developed an MPI/OpenMP hybrid parallel inference method for LDA, and evaluated the performance of the inference under various settings of an SMP cluster. We further investigated the approximation that controls the inter-node communications, and found out that it achieved noticeable increase in inference speed while maintaining inference accuracy.

In this letter, we present a joint blind adaptive scheme to suppress inter-block interference and estimate a carrier frequency offset (CFO) in downlink OFDMA systems. The proposed scheme is a combination of a channel shortening method and a CFO estimator, both based on the carrier nulling criterion. Simulation results demonstrate the effectiveness of the proposed scheme.

To mitigate the inter-cell interference in multicell downlink systems, this letter consider the robust precoder design for multicell cooperation where the knowledge of channel state available at the base station is imperfect. Assuming that imperfect channel state information (CSI) can be exchanged among cells but with no data sharing, we investigate the worst-case performance optimization problem with bounded CSI error. Our objective is to minimize the weighted sum mean-square-error (MSE) subject to per-base-station power constraints. A distributed solution is obtained by reformulating the upper bound of MSE and exploiting the Lagrangian method for the optimal problem. Simulation results demonstrate that the proposed algorithm is robust to guarantee the worst-case sum rate performance and has lower computational complexity than the SINR-based design.

MIMO two-way multi-hop networks are considered in which the radio resource is fully reused in all multi-hop links to increase spectrum efficiency while the adjacent interference signals are cancelled by MIMO processing. In addition, the nodes in the multi-hop network optimize their transmit powers to mitigate the remaining overreach interference. Our main contribution in this paper is to investigate an efficient relay placement method with power allocation in such networks. We present two formulations, namely QoS-constrained optimization and SINR balancing, and solve them using a sequential geometric programming method. The proposed algorithm takes advantage of convex optimization to find an efficient configuration. Simulation results show that relay placement has an important impact on the effectiveness of power allocation to mitigate the interference. Particularly, we found that an uniform relay location is optimal only in power-limited scenarios. With optimal relay locations, significant end-to-end rate gain and power consumption reduction are achieved by SINR balancing and QoS-constrained optimization, respectively. Furthermore, the optimal number of hops is investigated in power or interference-limited scenarios.

In this paper, we introduce generalized feed-forward shift registers (GF2SR) to apply them to secure and testable scan design. Previously, we introduced SR-equivalents and SR-quasi-equivalents which can be used in secure and testable scan design, and showed that inversion-inserted linear feed-forward shift registers (I2LF2SR) are useful circuits for the secure and testable scan design. GF2SR is an extension of I2LF2SR and the class is much wider than that of I2LF2SR. Since the cardinality of the class of GF2SR is much larger than that of I2LF2SR, the security level of scan design with GF2SR is much higher than that of I2LF2SR. We consider how to control/observe GF2SR to guarantee easy scan-in/out operations, i.e., state-justification and state-identification problems are considered. Both scan-in and scan-out operations can be overlapped in the same way as the conventional scan testing, and hence the test sequence for the proposed scan design is of the same length as the conventional scan design. A program called WAGSR (Web Application for Generalized feed-forward Shift Registers) is presented to solve those problems.

This paper presents a method for learning an overcomplete, nonnegative dictionary and for obtaining the corresponding coefficients so that a group of nonnegative signals can be sparsely represented by them. This is accomplished by posing the learning as a problem of nonnegative matrix factorization (NMF) with maximization of the incoherence of the dictionary and of the sparsity of coefficients. By incorporating a dictionary-incoherence penalty and a sparsity penalty in the NMF formulation and then adopting a hierarchically alternating optimization strategy, we show that the problem can be cast as two sequential optimal problems of quadratic functions. Each optimal problem can be solved explicitly so that the whole problem can be efficiently solved, which leads to the proposed algorithm, i.e., sparse hierarchical alternating least squares (SHALS). The SHALS algorithm is structured by iteratively solving the two optimal problems, corresponding to the learning process of the dictionary and to the estimating process of the coefficients for reconstructing the signals. Numerical experiments demonstrate that the new algorithm performs better than the nonnegative K-SVD (NN-KSVD) algorithm and several other famous algorithms, and its computational cost is remarkably lower than the compared algorithms.

In this letter, we first introduce a new generalized cyclotomic sequence of order two of length pq, then we calculate its linear complexity and minimal polynomial. Our results show that this sequence possesses both high linear complexity and optimal balance on 1 s and 0 s, which may be attractive for use in stream cipher cryptosystems.

Turbo equalization is an iterative equalization and decoding technique that can achieve impressive performance gains for communication systems. In this letter, we investigate the turbo equalization method for the decoding of the Davey-MacKay (DM) construction over the IDS-AWGN channels, which indicates a cascaded insertion, deletion, substitution (IDS) channel and an additive white Gaussian noise (AWGN) channel. The inner decoder for the DM construction can be seen as an maximum a-posteriori (MAP) detector. It receives the beliefs generated by the outer LDPC decoder when turbo equalization is used. Two decoding schemes with different kinds of inner decoders, namely hard-input inner decoder and soft-input inner decoder, are investigated. Simulation results show that significant performance gains are obtained for both decoders with respect to the insertion/deletion probability at different SNR values.

An instrumental variable (IV) based linear estimator is proposed for effective target localization in sensor network by using time-difference-of-arrival (TDOA) measurement. Although some linear estimation approaches have been proposed in much literature, the target localization based on TDOA measurement still has a room for improvement. Therefore, we analyze the estimation errors of existing localization estimators such as the well-known quadratic correction least squares (QCLS) and the robust least squares (RoLS), and demonstrate advantages of the proposition by comparing the estimation errors mathematically and showing localization results through simulation. In addition, a recursive form of the proposition is derived to consider a real time application.

In this paper, we present the validity and potential capacity of a modeling and simulation environment for the nonresonant plasmonic terahertz (THz) detector based on the silicon (Si) field-effect transistor (FET) with a technology computer-aided design (TCAD) platform. The nonresonant and “overdamped” plasma-wave behaviors have been modeled by introducing a quasi-plasma electron charge box as a two-dimensional electron gas (2DEG) in the channel region only around the source side of Si FETs. Based on the coupled nonresonant plasma-wave physics and continuity equation on the TCAD platform, the alternate-current (AC) signal as an incoming THz wave radiation successfully induced a direct-current (DC) drain-to-source output voltage as a detection signal in a sub-THz frequency regime under the asymmetric boundary conditions with a external capacitance between the gate and drain. The average propagation length and density of a quasi-plasma have been confirmed as around 100 nm and 11019/cm3, respectively, through the transient simulation of Si FETs with the modulated 2DEG at 0.7 THz. We investigated the incoming radiation frequency dependencies on the characteristics of the plasmonic THz detector operating in sub-THz nonresonant regime by using the quasi-plasma modeling on TCAD platform. The simulated dependences of the photoresponse with quasi-plasma 2DEG modeling on the structural parameters such as gate length and dielectric thickness confirmed the operation principle of the nonresonant plasmonic THz detector in the Si FET structure. The proposed methodologies provide the physical design platform for developing novel plasmonic THz detectors operating in the nonresonant detection mode.