In ASR (Automatic Speech Recognition) applications, one of the most important issues in the real-time beamforming of microphone arrays is the inability to capture the whole acoustic dynamics via a finite-length of data and a finite number of array elements. For example, the reflected source signal impinging from the side-lobe direction presents a coherent interference, and the non-minimal phase channel dynamics may require an infinite amount of data in order to achieve perfect equalization (or inversion). All these factors appear as uncertainties or un-modeled dynamics in the receiving signals. Traditional adaptive algorithms such as NLMS that do not consider these errors will result in performance deterioration. In this paper, a time domain beamformer using H∞ filtering approach is proposed to adjust the beamforming parameters. Furthermore, this work also proposes a frequency domain approach called SPFDBB (Soft Penalty Frequency Domain Block Beamformer) using H∞ filtering approach that can reduce computational efforts and provide a purified data to the ASR application. Experimental results show that the adaptive H∞ filtering method is robust to the modeling errors and suppresses much more noise interference than that in the NLMS based method. Consequently, the correct rate of ASR is also enhanced.

This paper describes a new talker direction estimation method for front-end processing to capture distant-talking speech by using a microphone array. The proposed method consists of two algorithms: One is a TDOA (Time Delay Of Arrival) estimation algorithm based on a weighted CSP (Cross-power Spectrum Phase) analysis with an average speech spectrum and CSP coefficient subtraction. The other is a talker direction estimation algorithm based on ML (Maximum Likelihood) estimation in a time sequence of the estimated TDOAs. To evaluate the effectiveness of the proposed method, talker direction estimation experiments were carried out in an actual office room. The results confirmed that the talker direction estimation performance of the proposed method is superior to that of the conventional methods in both diffused- and directional-noise environments.

In this paper we propose a novel spatial fading simulator to evaluate the performance of an array antenna and show its spatial stochastic characteristics by computer simulation based on parameters verified by experimental data. We introduce a cavity-excited circular array (CECA) as a fading simulator that can simulate realistic mobile communication environments. To evaluate the antenna array, two stochastic characteristics are necessary. The first one is the fading phenomenon and the second is the angular spread (AS) of the incident wave. The computer simulation results with respect to fading and AS show that CECA works well as a spatial fading simulator for performance evaluation of an antenna array. We first present the basic structure, features and design methodology of CECA, and then show computer simulation results of the spatial stochastic characteristics. The results convince us that CECA is useful to evaluate performance of antenna arrays.

We report on the design and experimental results of a fix-tuned Superconductor-Insulator-Superconductor (SIS) mixer for Atacama Large Millimeter/submillimeter Array (ALMA) band 8 (385-500 GHz) receivers. Nb-based SIS junctions of a current density of 10 kA/cm2 and one micrometer size (fabricated with a two-step lift-off process) are employed to accomplish the ALMA receiver specification, which requires wide frequency coverage as well as low noise temperature. A parallel-connected twin-junction (PCTJ) is designed to resonate at the band center to tune out the junction geometric capacitance. A waveguide-microstrip probe is optimized to have nearly frequency-independent impedance at the probe's feed point, thereby making it easy to match the low-impedance PCTJ over a wide frequency band. The RF embedding impedance is retrieved by fitting the measured pumped I-V curves to confirm good matching between PCTJ and signal source. We demonstrate here a minimum double-sideband receiver noise temperature of 3 times of quantum limits for an intermediate-frequency range of 4-8 GHz. The mixers were measured in band 8 cartridge with a sideband separation scheme. Single-sideband receiver noise below ALMA specification was achieved over the whole band.

This paper introduces a method of merging systolic messy arrays. A systolic messy array features data-triggered PEs placed in various directions in a 2-dimensional lattice plane. The two kinds of merging are described as Shared-array and Interlacing-array. A shared-array is a systolic messy array where at least two systolic messy arrays share portions of their arrays and the data on the portions is shared with all systolic messy arrays. An interlacing-array is a systolic messy array where at least two systolic messy arrays share portions of their arrays but where the data on the portions is not shared. The data on the portions flows independently so that an interlacing-array can deal with each of its own calculations without interference. Several examples of the two kinds of merging are presented and their construction methods are illustrated.

In many parallel programs, run-time array redistribution is usually required to enhance data locality and reduce remote memory access on the distributed memory multicomputers. In general, array distribution can be classified into regular distribution and irregular distribution according to the distribution fashion. Many methods for performing regular array redistribution have been presented in the literature. However, for the heterogeneous computation environment, irregular array redistributions can be used to adjust data assignment at run-time. In this paper, an Essential Cycle Calculation method for unequal block sizes array redistribution is presented. In the ECC method, a processor first computes the source/destination processor/data sets of array elements in the first essential cycle of the local array it owns. From the source/destination processor/data sets of array elements in the first essential cycle, we can construct packing/unpacking pattern tables. Since each essential cycle has the same communication pattern, based on the packing/unpacking pattern tables, a processor can pack/unpack array elements efficiently. To evaluate the performance of the ECC method, we have implemented this method on an IBM SP2 parallel machine and compare it with the Sequence method. The cost models for these methods are also presented. The experimental results show that the ECC method greatly outperforms the Sequence method for all test samples.

This paper presents two improved triple parity placement schemes, the HDD1 (Horizontal and Dual Diagonal) scheme and the HDD2 scheme, to enhance the reliability of a disk array system. Both the schemes can tolerate up to three column disk failures by using three types of parity information (horizontal, diagonal, and anti-diagonal parities) in a disk array. HDD1 scheme can decrease the frequency of bottlenecks because its horizontal and anti-diagonal parities are uniformly distributed over a disk array, with its diagonal parities placed in dedicated column disks. HDD2 scheme possesses one more column disks than HDD1 to store the horizontal parities and an additional diagonal parity; its anti-diagonal and diagonal parities are placed in the same way as in HDD1 scheme, only with a minor difference. The encoding and decoding algorithms of the two schemes are rather simple and straightforward, some steps of its procedure can even be executed in parallel, which makes the disk failure recovery faster.

This paper proposes a parity placement scheme, Row-Oblique Parity (ROP), for protecting against double disk failure in disk array systems. It stores all data unencoded, and uses only exclusive-or (XOR) operations to compute parity. ROP is provably optimal in computational complexity, both during construction and reconstruction. It is optimal in the capacity of redundant information stored and accessed. The simplicity of ROP allowed us to implement it within the current available RAID framework.

The performance of a feedback-type adaptive array antenna (AAA) system placed only at a base station (BS) in an FDD/DS-CDMA system remains insufficiently clear. We evaluate the performance of this system by considering the effect of a rake receiver, spacing distance between antennas, the maximum Doppler frequency (fd), and control delay time (Td) on BER performance. In this system, the mobile station (MS) determines optimum weights of antenna elements and sends them back to BS as feedback information. We assume that the optimum weights are not quantized. Thereby, we estimate the performance degradation of 3GPP transmit diversity system, where the feedback information is quantized using a few bits. Computer simulation results show that the rake receiver achieves better BER performance because of the time diversity effect with rake receiver. The AAA with a wide antenna spacing gives high diversity gain for the received signals. For a high value of fd Td, BER performance becomes worse because weighting factors cannot follow the changing speed of channel characteristics. The degradation in performance of a 3GPP system is clarified.

This paper presents a new generative approach for generating two-dimensional signals having both a low peak factor (crest factor) and a flat power spectrum. The flat power spectrum provides zero auto-correlation, except at the zero shift. The proposed method is a generative scheme, not a search method, and produces a two-dimensional signal of size 2(2n1+1)2(2n2+1)2 for an arbitrary pair of positive integers n1 and n2 without any computer search. The peak factor of the proposed signal is equal to the peak factor of a single trigonometric function.

Low-density parity-check (LDPC) codes are one of the most promising next-generation error-correcting codes. For practical use, efficient methods for encoding of LDPC codes are needed and have to be studied. However, it seems that no general encoding methods suitable for hardware implementation have been proposed so far and for randomly constructed LDPC codes there have been no other methods than the simple one using generator matrices. In this paper we show that some classes of quasi-cyclic LDPC codes based on circulant permutation matrices, specifically LDPC codes based on array codes and a special class of Sridhara-Fuja-Tanner codes and Fossorier codes can be encoded by division circuits as cyclic codes, which are very easy to implement. We also show some properties of these codes.

Many parallel Fast Fourier Transform (FFT) algorithms adopt multiple stages architecture to increase performance. However, data permutation between stages consumes volume memory and processing time. One FFT array processing mapping algorithm is proposed in this paper to overcome this demerit. In this algorithm, arbitrary 2k butterfly units (BUs) could be scheduled to work in parallel on n=2s data (k=0,1,..., s-1). Because no inter stage data transfer is required, memory consumption and system latency are both greatly reduced. Moreover, with the increasing of BUs, not only does throughput increase linearly, system latency also decreases linearly. This array processing orientated architecture provides flexible tradeoff between hardware cost and system performance. In theory, the system latency is (s2s-k)tclk and the throughput is n/(s2s-ktclk), where tclk is the system clock period. Based on this mapping algorithm, several 18-bit word-length 1024-point FFT processors implemented with TSMC0.18 µm CMOS technology are given to demonstrate its scalability and high performance. The core area of 4-BU design is 2.9911.121 mm2 and clock frequency is 326 MHz in typical condition (1.8 V,25). This processor completes 1024 FFT calculation in 7.839 µs.

A design of a linearly-polarized non-resonant waveguide broad-wall transverse slot linear array with suppressed grating lobes is presented. Each unit element in the array consists of a transverse slot, an inductive post and a parasitic dipole-pair at a height of half of the free space wavelength. It is designed as an isolated unit without considering mutual coupling by using the Method of Moments (MoM) for radiation suppression in grating beam direction and reflection cancellation at the input. The elements thus designed are used in a travelling wave array environment. It is predicted that the reflection is less than -20 dB at 11.95 GHz while the grating lobes are suppressed by more than 15 dB. The design and the characteristics of the array are confirmed by measurements.

In this paper, a three-way divider is proposed for a partially-corporate feed in an alternating phase-fed single-layer slotted waveguide array. The divider is placed at the middle of the feed waveguide and reduces the long line effects; the frequency bandwidth is doubled. It is a kind of cross junction with one input port and three output ports; most of the power is equally divided into the right and left halves of the feed waveguide while the rest of power goes straight into the center radiating waveguide. Based upon the moment method design of the three-way divider, an inductive post is introduced for wide band power dividing control to the radiating waveguide. Reflection is below -20 dB over a wide bandwidth of 24.3-26.3 GHz, and the range of power dividing ratio ranges from 1/43 to 1/4. The amplitude and the phase from the two output ports to the feed waveguide are well balanced, and the differences are less than 0.1 dB and 5.0 degrees, respectively. The MoM analysis and the wide band design are verified experimentally in the 4 GHz band.

To understand the brightness uniformity for the driver of the LED array display, automatic electronic measurement equipment and its testing scheme will be proposed in this paper. The driving performance and dynamic characteristics will be investigated by using the proposed current-based bias voltage regulator. A complete testing procedure will be provided to assess the performance for the LED array display driver.

Our previously proposed orthogonal code hopping multiplexing (OCHM) [1],[2] scheme is designed to accommodate a large number of bursty downlink users. However, it may undergo link quality degradation due to symbol perforations occurring when all code-collision symbol values are not identical. In this letter, a group-level random codeword hopping-pattern allocation (GRCHA) scheme is proposed to produce fewer symbol perforations than the previous symbol-by-symbol random codeword hopping (SRCH) of OCHM [1]. The proposed GRCHA scheme combined with the spatial filtering capability of switched-beam array antennas (SBAA) is expected to significantly reduce the symbol perforation probability in the OCHM scheme, and inter-beam softer handoff is applied to cope with high symbol perforation probability for users in overlapping beam areas of SBAA. The performance is evaluated by theoretical analysis and simulation in terms of the average symbol perforation probability. The proposed GRCHA scheme yields better performance than the SRCH scheme and the dedicated codeword allocation scheme, and the diversity gain of inter-beam softer handoff mitigates the effect of high symbol perforation probability for users in the overlapping beam areas.

This paper presents designs and performances of 76 GHz band alternating-phase fed single-layer slotted waveguide arrays. Two kinds of design, that is, uniform aperture illumination for maximum gain and Taylor distribution for sidelobe suppression of -25 dB, are conducted. High gain and high efficiency performance of 34.8 dBi with 57% is achieved for the former, while satisfactory sidelobe suppression of -20 dB in the H-plane and -23 dB in the E-plane with high efficiency is confirmed for the latter. The simple structure dispensing with electrical contact between the slotted plate and the groove feed structure is the key advantage of alternating-phase fed arrays and the slotted plate is just tacked on the feed structure with screws at the periphery. High gain and high efficiency performances predicted theoretically as well as design flexibility of the alternating-phase fed array are demonstrated in the millimeter wave frequency.

The purpose of this paper is to improve a feedback-type adaptive array antenna (AAA) with feedback information quantized by one bit which was presented recently on TDMA system by an author of this paper. The improvement is made by using adaptive, instead of constant, update size of adaptive antenna weights control. Computer simulation results show that the performance of this system is improved to be almost equivalent to the performance of a system without quantization of the feedback information for wide range of fading speed. The results include the effect of control delay time and the maximum Doppler frequency under flat fading and frequency-selective fading.

In this letter, we present a space division multiple access (SDMA) approach for IEEE802.11a-based system employing pre-fast Fourier transform (FFT) adaptive array antenna (AAA) at base station (BS). As the core idea, we propose a preamble subcarrier assignment method to generate different preambles for different users using the same signal burst structure defined by IEEE802.11a, by which BS can effectively distinguish each user from other users and accurately estimate the channel impulse response (CIR) for each user. In this way, SDMA can be easily realized with no significant change in IEEE802.11a-based system. The performance of the proposed SDMA system is evaluated by computer simulation using a realistic spatio-temporal indoor wireless channel model.

This investigation proposed two array beamformers SPFDBB (Soft Penalty Frequency Domain Block Beamformer) and FDABB (Frequency Domain Adjustable Block Beamformer). Compared with the conventional beamformers, these frequency-domain methods can significantly reduce the computation power requirement in ASR (Automatic Speech Recognition) based applications. Like other reference signal based techniques, SPFDBB and FDABB minimize microphone's mismatch, desired signal cancellation caused by reflection effects and resolution due to the array's position. Additionally, these proposed methods are suitable for both near-field and far-field environments. Generally, the convolution relation between channel and speech source in time domain cannot be modeled accurately as a multiplication in the frequency domain with a finite window size, especially in ASR applications. SPFDBB and FDABB can approximate this multiplication by treating several frames as a block to achieve a better beamforming result. Moreover, FDABB adjusts the number of frames on-line to cope with the variation of characteristics in both speech and interference signals. A better performance was found to be achievable by combining these methods with an ASR mechanism.